S912XEG128J2MAL Freescale Semiconductor, S912XEG128J2MAL Datasheet - Page 481

• Manufacturer Part Number: S912XEG128J2MAL
• Description: 16-bit Microcontrollers - MCU 16BIT 128K FLASH 16K RAM
• Manufacturer: Freescale Semiconductor

Specifications of S912XEG128J2MAL

• Rohs: yes
• Core: RISC
• Processor Series: HCS12X
• Data Bus Width: 16 bit
• Maximum Clock Frequency: 50 MHz
• Program Memory Size: 128 KB
• Data Ram Size: 12 KB
• On-chip Adc: Yes
• Operating Supply Voltage: 5 V
• Operating Temperature Range: - 40 C to + 125 C
• Package / Case: LQFP-112
• Mounting Style: SMD/SMT
• A/d Bit Size: 12 bit
• A/d Channels Available: 8
• Data Rom Size: 4 KB
• Interface Type: CAN, I2C, SCI, SPI
• Maximum Operating Temperature: + 125 C
• Minimum Operating Temperature: - 40 C
• On-chip Dac: Yes
• Program Memory Type: Flash
• Supply Voltage - Max: 5.5 V
• Supply Voltage - Min: 3.13 V

1. Denotes the default value out of reset.This value should be used to disable the RTI to ensure future backwards compatibility.
Freescale Semiconductor
1001 (÷10)
1010 (÷11)
1011 (÷12)
1100 (÷13)
1101 (÷14)
1110 (÷15)
1111 (÷16)
0000 (÷1)
0001 (÷2)
0010 (÷3)
0011 (÷4)
0100 (÷5)
0101 (÷6)
0001 (÷2)
0010 (÷3)
0011 (÷4)
0100 (÷5)
0101 (÷6)
0110 (÷7)
0111 (÷8)
1000 (÷9)
RTR[3:0]
RTR[3:0]
(1x10
1x10
2x10
3x10
4x10
5x10
6x10
(OFF)
OFF
OFF
OFF
OFF
OFF
OFF
OFF
OFF
OFF
OFF
OFF
OFF
OFF
OFF
OFF
000
000
3
3
3
3
3
3
3
Table 11-10. RTI Frequency Divide Rates for RTDEC = 0
Table 11-11. RTI Frequency Divide Rates for RTDEC=1
)
(2x10
10x10
12x10
MC9S12XE-Family Reference Manual Rev. 1.25
10x2
11x2
12x2
13x2
14x2
15x2
16x2
2x10
4x10
6x10
8x10
2x2
3x2
4x2
5x2
6x2
7x2
8x2
9x2
(2
001
001
10
10
10
10
10
10
10
10
10
10
10
10
10
10
10
10
3
3
3
3
3
)
3
3
)
(5x10
10x10
15x10
20x10
25x10
30x10
5x10
10x2
11x2
12x2
13x2
14x2
15x2
16x2
2x2
3x2
4x2
5x2
6x2
7x2
8x2
9x2
010
(2
010
11
11
11
11
11
11
11
11
11
3
11
11
11
11
11
11
11
3
)
3
3
3
3
3
)
(10x10
10x10
20x10
30x10
40x10
50x10
60x10
10x2
11x2
12x2
13x2
14x2
15x2
16x2
2x2
3x2
4x2
5x2
6x2
7x2
8x2
9x2
011
(2
011
Chapter 11 S12XE Clocks and Reset Generator (S12XECRGV1)
12
RTR[6:4] =
RTR[6:4] =
12
12
12
12
12
12
12
12
12
12
12
12
12
12
12
)
3
3
3
3
3
3
3
)
(20x10
100x10
120x10
20x10
40x10
60x10
80x10
10x2
11x2
12x2
13x2
14x2
15x2
16x2
100
2x2
3x2
4x2
5x2
6x2
7x2
8x2
9x2
(2
100
13
13
13
13
13
13
13
13
13
13
13
13
13
13
13
13
3
3
3
3
)
3
3
3
)
(50x10
100x10
150x10
200x10
250x10
300x10
50x10
10x2
11x2
12x2
13x2
14x2
15x2
16x2
101
2x2
3x2
4x2
5x2
6x2
7x2
8x2
9x2
(2
101
14
14
14
14
14
14
14
14
14
14
14
14
14
14
14
14
3
3
)
3
3
3
3
3
)
(100x10
100x10
200x10
300x10
400x10
500x10
600x10
10x2
11x2
12x2
13x2
14x2
15x2
16x2
2x2
3x2
4x2
5x2
6x2
7x2
8x2
9x2
110
(2
110
15
15
15
15
15
15
15
15
15
15
15
15
15
15
15
15
)
3
3
3
3
3
3
3
)
(200x10
200x10
400x10
600x10
800x10
1.2x10
10x2
11x2
12x2
13x2
14x2
15x2
16x2
1x10
2x2
3x2
4x2
5x2
6x2
7x2
8x2
9x2
(2
111
111
16
16
16
16
16
16
16
16
16
16
16
16
16
16
16
16
)
6
6
481
3
3
3
3
3
)