S912XEG128J2MAL Freescale Semiconductor, S912XEG128J2MAL Datasheet - Page 636
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S912XEG128J2MAL
Manufacturer Part Number
S912XEG128J2MAL
Description
16-bit Microcontrollers - MCU 16BIT 128K FLASH 16K RAM
Manufacturer
Freescale Semiconductor
Datasheet
1.S912XEG128J2MAL.pdf
(1324 pages)
Specifications of S912XEG128J2MAL
Rohs
yes
Core
RISC
Processor Series
HCS12X
Data Bus Width
16 bit
Maximum Clock Frequency
50 MHz
Program Memory Size
128 KB
Data Ram Size
12 KB
On-chip Adc
Yes
Operating Supply Voltage
5 V
Operating Temperature Range
- 40 C to + 125 C
Package / Case
LQFP-112
Mounting Style
SMD/SMT
A/d Bit Size
12 bit
A/d Channels Available
8
Data Rom Size
4 KB
Interface Type
CAN, I2C, SCI, SPI
Maximum Operating Temperature
+ 125 C
Minimum Operating Temperature
- 40 C
On-chip Dac
Yes
Program Memory Type
Flash
Supply Voltage - Max
5.5 V
Supply Voltage - Min
3.13 V
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Part Number:
S912XEG128J2MAL
Manufacturer:
NXP/恩智浦
Quantity:
20 000
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Chapter 16 Freescale’s Scalable Controller Area Network (S12MSCANV3)
16.3.3.1.2
636
Module Base + 0x00X0
Module Base + 0x00X1
ID[10:3]
ID[2:0]
Field
Field
RTR
IDE
7-0
7-5
4
3
Reset:
Reset:
W
W
R
R
Standard Format Identifier — The identifiers consist of 11 bits (ID[10:0]) for the standard format. ID10 is the
most significant bit and is transmitted first on the CAN bus during the arbitration procedure. The priority of an
identifier is defined to be highest for the smallest binary number. See also ID bits in
Standard Format Identifier — The identifiers consist of 11 bits (ID[10:0]) for the standard format. ID10 is the
most significant bit and is transmitted first on the CAN bus during the arbitration procedure. The priority of an
identifier is defined to be highest for the smallest binary number. See also ID bits in
Remote Transmission Request — This flag reflects the status of the Remote Transmission Request bit in the
CAN frame. In the case of a receive buffer, it indicates the status of the received frame and supports the
transmission of an answering frame in software. In the case of a transmit buffer, this flag defines the setting of
the RTR bit to be sent.
0 Data frame
1 Remote frame
ID Extended — This flag indicates whether the extended or standard identifier format is applied in this buffer. In
the case of a receive buffer, the flag is set as received and indicates to the CPU how to process the buffer
identifier registers. In the case of a transmit buffer, the flag indicates to the MSCAN what type of identifier to send.
0 Standard format (11 bit)
1 Extended format (29 bit)
IDR0–IDR3 for Standard Identifier Mapping
ID10
ID2
7
x
7
x
Table 16-31. IDR0 Register Field Descriptions — Standard
Figure 16-30. Identifier Register 0 — Standard Mapping
Figure 16-31. Identifier Register 1 — Standard Mapping
= Unused; always read ‘x’
ID9
ID1
6
x
6
x
Table 16-32. IDR1 Register Field Descriptions
MC9S12XE-Family Reference Manual Rev. 1.25
ID8
ID0
5
x
5
x
RTR
ID7
4
x
4
x
Description
Description
IDE (=0)
ID6
x
x
3
3
ID5
2
x
2
x
Table
Table
Freescale Semiconductor
ID4
16-32.
16-31.
x
x
1
1
ID3
0
x
0
x
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