S912XEG128J2MAL Freescale Semiconductor, S912XEG128J2MAL Datasheet - Page 658

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S912XEG128J2MAL

Manufacturer Part Number
S912XEG128J2MAL
Description
16-bit Microcontrollers - MCU 16BIT 128K FLASH 16K RAM
Manufacturer
Freescale Semiconductor
Datasheet

Specifications of S912XEG128J2MAL

Rohs
yes
Core
RISC
Processor Series
HCS12X
Data Bus Width
16 bit
Maximum Clock Frequency
50 MHz
Program Memory Size
128 KB
Data Ram Size
12 KB
On-chip Adc
Yes
Operating Supply Voltage
5 V
Operating Temperature Range
- 40 C to + 125 C
Package / Case
LQFP-112
Mounting Style
SMD/SMT
A/d Bit Size
12 bit
A/d Channels Available
8
Data Rom Size
4 KB
Interface Type
CAN, I2C, SCI, SPI
Maximum Operating Temperature
+ 125 C
Minimum Operating Temperature
- 40 C
On-chip Dac
Yes
Program Memory Type
Flash
Supply Voltage - Max
5.5 V
Supply Voltage - Min
3.13 V

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
S912XEG128J2MAL
Manufacturer:
NXP/恩智浦
Quantity:
20 000
Chapter 16 Freescale’s Scalable Controller Area Network (S12MSCANV3)
16.5
16.5.1
The procedure to initially start up the MSCAN module out of reset is as follows:
If the configuration of registers which are only writable in initialization mode shall be changed:
16.5.2
The bus-off recovery is user configurable. The bus-off state can either be left automatically or on user
request.
For reasons of backwards compatibility, the MSCAN defaults to automatic recovery after reset. In this
case, the MSCAN will become error active again after counting 128 occurrences of 11 consecutive
recessive bits on the CAN bus (see the Bosch CAN 2.0 A/B specification for details).
If the MSCAN is configured for user request (BORM set in MSCAN Control Register 1 (CANCTL1)), the
recovery from bus-off starts after both independent events have become true:
These two events may occur in any order.
658
1. Assert CANE
2. Write to the configuration registers in initialization mode
3. Clear INITRQ to leave initialization mode
1. Bring the module into sleep mode by setting SLPRQ and awaiting SLPAK to assert after the CAN
2. Enter initialization mode: assert INITRQ and await INITAK
3. Write to the configuration registers in initialization mode
4. Clear INITRQ to leave initialization mode and continue
bus becomes idle.
128 occurrences of 11 consecutive recessive bits on the CAN bus have been monitored
BOHOLD in MSCAN Miscellaneous Register (CANMISC) has been cleared by the user
Initialization/Application Information
MSCAN initialization
Bus-Off Recovery
MC9S12XE-Family Reference Manual Rev. 1.25
Freescale Semiconductor

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