DS21458LDK Maxim Integrated, DS21458LDK Datasheet - Page 14
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DS21458LDK
Manufacturer Part Number
DS21458LDK
Description
Network Controller & Processor ICs
Manufacturer
Maxim Integrated
Datasheet
1.DS21458LDK.pdf
(269 pages)
- Current page: 14 of 269
- Download datasheet (2Mb)
2.9 Extended System Information Bus
2.10 Control Port
Note: This data sheet assumes a particular nomenclature of the T1 and E1 operating environment. In
each 125s T1 frame, there are 24 8-bit channels plus a framing bit. It is assumed that the framing bit is
sent first followed by channel 1. For T1 and E1 each channel is made up of 8 bits, which are numbered 1
to 8. Bit 1, the MSB, is transmitted first. Bit 8, the LSB, is transmitted last. The term “locked” is used to
refer to two clock signals that are phase- or frequency-locked or derived from a common clock (i.e., a
1.544MHz clock can be locked to a 2.048MHz clock if they share the same 8kHz component).
Host can read interrupt and alarm status on up to eight ports (two devices) with a single-bus read
8-bit parallel control port
Multiplexed or nonmultiplexed buses
Intel or Motorola formats
Supports polled or interrupt-driven environments
Software access to device ID and silicon revision
Software-reset supported with automatic clear on power-up
Hardware reset pin
14 of 269
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