DS21458LDK Maxim Integrated, DS21458LDK Datasheet - Page 236
DS21458LDK
Manufacturer Part Number
DS21458LDK
Description
Network Controller & Processor ICs
Manufacturer
Maxim Integrated
Datasheet
1.DS21458LDK.pdf
(269 pages)
Figure 36-9. Transmit Side 1.544MHz Boundary Timing (With Elastic Store
Enabled)
NOTE:
1) TCHBLK is programmed to block channel 24 (if the TPCSI bit is set, then the signaling data at TSIG
will be ignored during channel 24).
TSYSCLK
TCHBLK
TCHCLK
TSSYNC
TSER
TSIG
1
CHANNEL 23
CHANNEL 23
A
B
C/A D/B
LSB MSB
236 of 269
CHANNEL 24
CHANNEL 24
A
DS21455/DS21458 Quad T1/E1/J1 Transceivers
B
C/A D/B
LSB
F MSB
CHANNEL 1
CHANNEL 1
A
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