DS21458LDK Maxim Integrated, DS21458LDK Datasheet - Page 246

• Manufacturer Part Number: DS21458LDK
• Description: Network Controller & Processor ICs
• Manufacturer: Maxim Integrated

Figure 36-19. Transmit Side Boundary Timing (With Elastic Store Disabled)
NOTES:
1) TSYNC is in the output mode (IOCR1.1 = 1.)
2) TSYNC is in the input mode (IOCR1.1 = 0).
3) TCHBLK is programmed to block channel 2.
4) TLINK is programmed to source the Sa4 bit.
5) The signaling data at TSIG during channel 1 is normally overwritten in the transmit formatter with the
6) Shown is a TNAF frame boundary.
CAS multiframe-alignment nibble (0000).
TCHBLK
TCHCLK
TSYNC
TSYNC
TLCLK
TLINK
TSER
TCLK
TSIG
1
2
3
4
4
LSB
D
DON'T CARE
Si
1
A
Sa4 Sa5 Sa6 Sa7 Sa8
CHANNEL 1
CHANNEL 1
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MSB
DON'T CARE
DS21455/DS21458 Quad T1/E1/J1 Transceivers
CHANNEL 2
CHANNEL 2
A
B
C
LSB MSB
D