DS21458LDK Maxim Integrated, DS21458LDK Datasheet - Page 208

• Manufacturer Part Number: DS21458LDK
• Description: Network Controller & Processor ICs
• Manufacturer: Maxim Integrated

31. PROGRAMMABLE BACKPLANE CLOCK SYNTHESIZER
The DS21455/DS21458 contain an on-chip clock synthesizer that generates a user-selectable clock
referenced to the recovered receive clock (RCLK). The synthesizer uses a phase-locked loop to generate
low-jitter clocks. Common applications include generation of port and backplane system clocks.
Register Name:
Register Description:
Register Address:
Bit #
Name
Default
Bit 0/Backplane Clock Enable (BPEN).
Bits 1 to 2/Backplane Clock Selects (BPCS0, BPCS1).
Bit 3/Unused, must be set to zero for proper operation.
Bit 4/Unused, must be set to zero for proper operation.
Bit 5/Unused, must be set to zero for proper operation.
Bit 6/Unused, must be set to zero for proper operation.
Bit 7/Unused, must be set to zero for proper operation.
BPCS1
0
0
1
1
0 = disable BPCLK pin (Pin held at logic 0)
1 = enable BPCLK pin
—
7
0
BPCS0
0
1
0
1
—
CCR2
Common Control Register 2
71h
6
0
BPCLK FREQUENCY (MHz)
—
5
0
16.384
8.192
4.096
2.048
—
4
0
208 of 269
—
3
0
DS21455/DS21458 Quad T1/E1/J1 Transceivers
BPCS1
2
0
BPCS0
1
0
BPEN
0
0