DS21458LDK Maxim Integrated, DS21458LDK Datasheet - Page 184

• Manufacturer Part Number: DS21458LDK
• Description: Network Controller & Processor ICs
• Manufacturer: Maxim Integrated

Register Name:
Register Description:
Register Address:
Bit #
Name
Default
Bit 0/Receive-Down Code Definition Bit 0 (C0). A “don’t care” if a 1-bit to 7-bit length is selected.
Bit 1/Receive-Down Code Definition Bit 1 (C1). A “don’t care” if a 1-bit to 7-bit length is selected.
Bit 2/Receive-Down Code Definition Bit 2 (C2). A “don’t care” if a 1-bit to 7-bit length is selected.
Bit 3/Receive-Down Code Definition Bit 3 (C3). A “don’t care” if a 1-bit to 7-bit length is selected.
Bit 4/Receive-Down Code Definition Bit 4 (C4). A “don’t care” if a 1-bit to 7-bit length is selected.
Bit 5/Receive-Down Code Definition Bit 5 (C5). A “don’t care” if a 1-bit to 7-bit length is selected.
Bit 6/Receive-Down Code Definition Bit 6 (C6). A “don’t care” if a 1-bit to 7-bit length is selected.
Bit 7/Receive-Down Code Definition Bit 7 (C7). A “don’t care” if a 1-bit to 7-bit length is selected.
Register Name:
Register Description:
Register Address:
Bit #
Name
Default
Bits 0 to 2/Receive Spare Code Length Definition Bits (RSC0 to RSC2).
Bit 3/Unused, must be set to zero for proper operation.
Bit 4/Unused, must be set to zero for proper operation.
Bit 5/Unused, must be set to zero for proper operation.
Bit 6/Unused, must be set to zero for proper operation.
Bit 7/Unused, must be set to zero for proper operation.
RSC2
0
0
0
0
1
1
1
1
RSC1
C7
—
7
0
7
0
0
0
1
1
0
0
1
1
RSC0
C6
—
RDNCD2
Receive-Down Code Definition Register 2
BCh
RSCC
In-Band Receive Spare Control Register
BDh
6
0
6
0
0
1
0
1
0
1
0
1
C5
LENGTH SELECTED (Bits)
—
5
0
5
0
C4
—
4
0
4
0
8/16
1
2
3
4
5
6
7
184 of 269
C3
—
3
0
3
0
DS21455/DS21458 Quad T1/E1/J1 Transceivers
RSC2
C2
2
0
2
0
RSC1
C1
1
0
1
0
RSC0
C0
0
0
0
0