ATAVRSB202 Atmel, ATAVRSB202 Datasheet - Page 174

• Manufacturer Part Number: ATAVRSB202
• Description: KIT BATT MGMT FOR ATMEGA32HVB
• Manufacturer: Atmel

Specifications of ATAVRSB202

• Main Purpose: *
• Embedded: *
• Utilized Ic / Part: *
• Primary Attributes: *
• Secondary Attributes: *
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

27.7.3
8042B–AVR–06/10
Slave Receiver Mode
Figure 27-14. Formats and States in the Master Receiver Mode
In the Slave Receiver mode, a number of data bytes are received from a master transmitter (see
Figure
zero or are masked to zero.
Figure 27-15. Data Transfer in Slave Receiver Mode
To initiate the Slave Receiver mode, TWAR and TWCR must be initialized as follows:
SDA
SCL
Successfull
reception
from a slave
receiver
Next transfer
started with a
repeated start
condition
Not acknowledge
received after the
slave address
Arbitration lost in slave
address or data byte
Arbitration lost and
addressed as slave
27-15). All the status codes mentioned in this section assume that the prescaler bits are
Device 1
RECEIVER
From master to slave
From slave to master
$08
SLAVE
S
SLA
TRANSMITTER
Device 2
MASTER
R
MR
A or A
DATA
$40
$48
$38
$68
A
A
A
$78
Device 3
Other master
Other master
n
continues
continues
P
$B0
DATA
A
Any number of data bytes
and their associated acknowledge bits
This number (contained in TWSR) corresponds
to a defined state of the Two-wire Serial Bus. The
prescaler bits are zero or masked to zero
........
ATmega16HVB/32HVB
$50
$38
To corresponding
states in slave mode
A
A
Device n
Other master
DATA
continues
V
BUS
$58
A
$10
P
R
R1
S
SLA
R2
W
R
MT
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