ATAVRSB202 Atmel, ATAVRSB202 Datasheet - Page 28

no-image

ATAVRSB202

Manufacturer Part Number
ATAVRSB202
Description
KIT BATT MGMT FOR ATMEGA32HVB
Manufacturer
Atmel
Datasheets

Specifications of ATAVRSB202

Main Purpose
*
Embedded
*
Utilized Ic / Part
*
Primary Attributes
*
Secondary Attributes
*
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
9.3
9.4
9.5
8042B–AVR–06/10
Clock Startup Sequence
Clock Output
System Clock Prescaler
1. To determine the accurate clock period as a function of die temperature, if needed by the
2. To determine a fixed value for the actual clock period independent of the die temperature,
When the CPU wakes up from Power-save, the CPU clock source is used to time the start-up,
ensuring a stable clock before instruction execution starts. When the CPU starts from reset,
there is an additional delay allowing the voltage regulator to reach a stable level before com-
mencing normal operation. The Ultra Low Power RC Oscillator is used for timing this real-time
part of the start-up time. Start-up times are determined by the SUT Fuses as shown in
on page
shown in
Table 9-3.
Note:
The CPU clock divided by 2 can be output to the PB1 pin. The CPU can enable the clock output
function by setting the CKOE bit in the MCU Control Register. The clock will not run in any sleep
modes.
The ATmega16HVB/32HVB has a System Clock Prescaler, used to prescale the Calibrated Fast
RC Oscillator. The system clock can be divided by setting the
ter” on page
as the requirement for power consumption and processing power changes. This system clock
will affect the clock frequency of the CPU and all synchronous peripherals. clk
FLASH
When switching between prescaler settings, the System Clock Prescaler ensures that no
glitches occurs in the clock system. It also ensures that no intermediate frequency is higher than
application, the Oscillator Sampling Interface should be used. Refer to section
Oscillator Sampling Interface” on page 29
for example to determine the best setting of the Battery Protection timing, use the calibra-
tion byte ULP_RC_FRQ stored in the signature address space, refer to section
the Signature Row from Software” on page 199
are divided by a factor as shown in
1. The actual value depends on the actual clock period of the Ultra Low Power RC Oscillator,
27. The number of Ultra Low Power RC Oscillator cycles used for each time-out is
Table
refer to
32, and this enables the user to decrease or increase the system clock frequency
Number of Ultra Low Power RC Oscillator Cycles
9-3.
Typ Time-out
”Ultra Low Power RC Oscillator” on page 27
128 ms
256 ms
512 ms
16 ms
32 ms
64 ms
4 ms
8 ms
(1)
Table 9-4 on page
for details.
for details.
ATmega16HVB/32HVB
for details.
33.
”CLKPR – Clock Prescale Regis-
Number of Cycles
16K
32K
64K
512
1K
2K
4K
8K
I/O
, clk
”Reading
”OSI –
CPU
Table 9-2
and clk-
28

Related parts for ATAVRSB202