ATAVRSB202 Atmel, ATAVRSB202 Datasheet - Page 44
![no-image](/images/manufacturer_photos/0/0/78/atmel_sml.jpg)
ATAVRSB202
Manufacturer Part Number
ATAVRSB202
Description
KIT BATT MGMT FOR ATMEGA32HVB
Manufacturer
Atmel
Specifications of ATAVRSB202
Main Purpose
*
Embedded
*
Utilized Ic / Part
*
Primary Attributes
*
Secondary Attributes
*
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
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11.2.2
11.2.3
8042B–AVR–06/10
External Reset
Watchdog Reset
Figure 11-2. Powering up ATmega16HVB/32HVB
An External Reset is generated by a low level on the RESET pin. Reset pulses longer than the
minimum pulse width (see
running. Shorter pulses are not guaranteed to generate a reset. When the applied signal
reaches the Reset Threshold Voltage – V
MCU after the Time-out period – t
Figure 11-3. External Reset During Operation
When the Watchdog times out, it will generate a short reset pulse of one CK cycle duration. On
the falling edge of this pulse, the delay timer starts counting the Time-out period t
page 46
for details on operation of the Watchdog Timer.
INTERNAL_RESET
SLEEP_MODE
V
3.3 V
POR
V
V
BATT
REG
POT
Table 32-3 on page
TOUT
Power-off
– has expired.
RST
– on its positive edge, the delay counter starts the
232) will generate a reset, even if the clock is not
ATmega16HVB/32HVB
t
Reset
TOUT
Active
TOUT
. Refer to
44
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