ATAVRSB202 Atmel, ATAVRSB202 Datasheet - Page 192

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ATAVRSB202

Manufacturer Part Number
ATAVRSB202
Description
KIT BATT MGMT FOR ATMEGA32HVB
Manufacturer
Atmel
Datasheets

Specifications of ATAVRSB202

Main Purpose
*
Embedded
*
Utilized Ic / Part
*
Primary Attributes
*
Secondary Attributes
*
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
29.4
29.4.1
29.4.2
8042B–AVR–06/10
Read-While-Write and No Read-While-Write Flash Sections
RWW – Read-While-Write Section
NRWW – No Read-While-Write Section
Whether the CPU supports Read-While-Write or if the CPU is halted during a Boot Loader soft-
ware update is dependent on which address that is being programmed. In addition to the two
sections that are configurable by the BOOTSZ Fuses as described above, the Flash is also
divided into two fixed sections, the Read-While-Write (RWW) section and the No Read-While-
Write (NRWW) section. The limit between the RWW- and NRWW sections is given in
6 on page 204
• When erasing or writing a page located inside the RWW section, the NRWW section can be
• When erasing or writing a page located inside the NRWW section, the CPU is halted during the
Note that the user software can never read any code that is located inside the RWW section dur-
ing a Boot Loader software operation. The syntax “Read-While-Write section” refers to which
section that is being programmed (erased or written), not which section that actually is being
read during a Boot Loader software update.
If a Boot Loader software update is programming a page inside the RWW section, it is possible
to read code from the Flash, but only code that is located in the NRWW section. During an on-
going programming, the software must ensure that the RWW section never is being read. If the
user software is trying to read code that is located inside the RWW section (i.e., by a
call/jmp/lpm or an interrupt) during programming, the software might end up in an unknown
state. To avoid this, the interrupts should either be disabled or moved to the Boot Loader sec-
tion. The Boot Loader section is always located in the NRWW section. The RWW Section Busy
bit (RWWSB) in the Store Program Memory Control and Status Register (SPMCSR) will be read
as logical one as long as the RWW section is blocked for reading. After a programming is com-
pleted, the RWWSB must be cleared by software before reading code located in the RWW
section. See
details on how to clear RWWSB.
The code located in the NRWW section can be read when the Boot Loader software is updating
a page in the RWW section. When the Boot Loader code updates the NRWW section, the CPU
is halted during the entire Page Erase or Page Write operation.
Table 29-1.
Address During the Programming?
read during the operation.
entire operation.
Which Section does the Z-pointer
NRWW Section
RWW Section
”SPMCSR – Store Program Memory Control and Status Register” on page 206
Read-While-Write Features
and
Figure 29-2 on page
Which Section Can be Read
During Programming?
194. The main difference between the two sections is:
NRWW Section
None
ATmega16HVB/32HVB
Halted?
CPU
Yes
No
Read-While-Write
Supported?
Yes
No
Table 29-
192
for

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