M68EVB908GB60E Freescale Semiconductor, M68EVB908GB60E Datasheet - Page 13

• Manufacturer Part Number: M68EVB908GB60E
• Description: BOARD EVAL FOR MC9S08GB60
• Manufacturer: Freescale Semiconductor
• Type: MCUr

Specifications of M68EVB908GB60E

• Contents: Module and Misc Hardware
• Processor To Be Evaluated: MC9S08GB
• Data Bus Width: 8 bit
• Interface Type: RS-232
• Silicon Manufacturer: Freescale
• Core Architecture: HCS08
• Core Sub-architecture: HCS08
• Silicon Core Number: MC9S08
• Silicon Family Name: S08GB
• Kit Contents: GB60 Evaluation Kit
• Rohs Compliant: Yes
• For Use With/related Products: MC9S08GB60
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

Section Number
11.8 Additional SCI Functions ..............................................................................................................176
11.9 Stop Mode Operation ....................................................................................................................176
11.10 SCI Registers and Control Bits .....................................................................................................177
12.1 Features .........................................................................................................................................189
12.2 Block Diagrams .............................................................................................................................189
12.3 Functional Description ..................................................................................................................192
12.4 SPI Registers and Control Bits ......................................................................................................196
Freescale Semiconductor
11.8.1 8- and 9-Bit Data Modes ................................................................................................176
11.9.1 Loop Mode .....................................................................................................................177
11.9.2 Single-Wire Operation ...................................................................................................177
11.10.1 SCI x Baud Rate Registers (SCIxBDH, SCIxBDL) ......................................................177
11.10.2 SCI x Control Register 1 (SCIxC1) ...............................................................................178
11.10.3 SCI x Control Register 2 (SCIxC2) ...............................................................................180
11.10.4 SCI x Status Register 1 (SCIxS1) ..................................................................................181
11.10.5 SCI x Status Register 2 (SCIxS2) ..................................................................................183
11.10.6 SCI x Control Register 3 (SCIxC3) ...............................................................................184
11.10.7 SCI x Data Register (SCIxD) ........................................................................................185
12.2.1 SPI System Block Diagram ...........................................................................................189
12.2.2 SPI Module Block Diagram ...........................................................................................190
12.2.3 SPI Baud Rate Generation .............................................................................................192
12.3.1 SPI Clock Formats .........................................................................................................193
12.3.2 SPI Pin Controls ............................................................................................................195
12.3.3 SPI Interrupts .................................................................................................................196
12.3.4 Mode Fault Detection ....................................................................................................196
12.4.1 SPI Control Register 1 (SPI1C1) ...................................................................................197
12.4.2 SPI Control Register 2 (SPI1C2) ...................................................................................198
12.4.3 SPI Baud Rate Register (SPI1BR) .................................................................................199
12.4.4 SPI Status Register (SPI1S) ...........................................................................................201
12.4.5 SPI Data Register (SPI1D) ............................................................................................202
12.3.2.1 SPSCK1 — SPI Serial Clock ........................................................................195
12.3.2.2 MOSI1 — Master Data Out, Slave Data In ..................................................195
12.3.2.3 MISO1 — Master Data In, Slave Data Out ..................................................195
12.3.2.4 SS1 — Slave Select .......................................................................................195
Serial Peripheral Interface (SPI) Module
MC9S08GB/GT Data Sheet, Rev. 2.3
Chapter 12
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