M68EVB908GB60E Freescale Semiconductor, M68EVB908GB60E Datasheet - Page 171

• Manufacturer Part Number: M68EVB908GB60E
• Description: BOARD EVAL FOR MC9S08GB60
• Manufacturer: Freescale Semiconductor
• Type: MCUr

Specifications of M68EVB908GB60E

• Contents: Module and Misc Hardware
• Processor To Be Evaluated: MC9S08GB
• Data Bus Width: 8 bit
• Interface Type: RS-232
• Silicon Manufacturer: Freescale
• Core Architecture: HCS08
• Core Sub-architecture: HCS08
• Silicon Core Number: MC9S08
• Silicon Family Name: S08GB
• Kit Contents: GB60 Evaluation Kit
• Rohs Compliant: Yes
• For Use With/related Products: MC9S08GB60
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

The transmitter is enabled by setting the TE bit in SCIxC2. This queues a preamble character that is one
full character frame of logic high. The transmitter then remains idle (TxD1 pin remains high) until data is
available in the transmit data buffer. Programs store data into the transmit data buffer by writing to the SCI
data register (SCIxD).
The central element of the SCI transmitter is the transmit shift register that is either 10 or 11 bits long
depending on the setting in the M control bit. For the remainder of this section, we will assume M = 0,
selecting the normal 8-bit data mode. In 8-bit data mode, the shift register holds a start bit, eight data bits,
and a stop bit. When the transmit shift register is available for a new SCI character, the value waiting in
the transmit data register is transferred to the shift register (synchronized with the baud rate clock) and the
transmit data register empty (TDRE) status flag is set to indicate another character may be written to the
transmit data buffer at SCIxD.
Freescale Semiconductor
RATE CLOCK
1 × BAUD
INTERNAL BUS
PE
TE
PT
M
ENABLE
TXDIR
SBK
Figure 11-3. SCI Transmitter Block Diagram
GENERATION
PARITY
T8
MC9S08GB/GT Data Sheet, Rev. 2.3
H
(WRITE-ONLY)
8
11-BIT TRANSMIT SHIFT REGISTER
7
6
SCID – Tx BUFFER
TRANSMIT CONTROL
SHIFT DIRECTION
5
4
TDRE
TCIE
TIE
TC
3
2
1
0
L
LOOPS
SCI CONTROLS TxD1
TxD1 DIRECTION
RSRC
CONTROL
Transmitter Functional Description
LOOP
Tx INTERRUPT
REQUEST
TO RECEIVE
DATA IN
TO TxD1 PIN
TO TxD1
PIN LOGIC
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