M68EVB908GB60E Freescale Semiconductor, M68EVB908GB60E Datasheet - Page 31

• Manufacturer Part Number: M68EVB908GB60E
• Description: BOARD EVAL FOR MC9S08GB60
• Manufacturer: Freescale Semiconductor
• Type: MCUr

Specifications of M68EVB908GB60E

• Contents: Module and Misc Hardware
• Processor To Be Evaluated: MC9S08GB
• Data Bus Width: 8 bit
• Interface Type: RS-232
• Silicon Manufacturer: Freescale
• Core Architecture: HCS08
• Core Sub-architecture: HCS08
• Silicon Core Number: MC9S08
• Silicon Family Name: S08GB
• Kit Contents: GB60 Evaluation Kit
• Rohs Compliant: Yes
• For Use With/related Products: MC9S08GB60
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

as the IRQ input and is set to detect rising edges, the pullup enable control bit enables a pulldown device
rather than a pullup device.
2.3.6
Table 2-2
common pin interfaces are hardwired to internal circuits.
Freescale Semiconductor
PTA0/KBI1P0
PTA1/KBI1P1
PTA2/KBI1P2
PTA3/KBI1P3
PTA4/KBI1P4
PTA5/KBI1P5
PTA6/KBI1P6
PTA7/KBI1P7
PTB0/AD1P0
PTB1/AD1P1
PTB2/AD1P2
PTB3/AD1P3
PTB4/AD1P4
PTB5/AD1P5
PTB6/AD1P6
PTB7/AD1P7
PTC1/RxD2
PTC2/SDA1
PTC3/SCL1
PTC0/TxD2
RESET
V
V
V
Name
V
V
IRQ
V
Pin
DDAD
SSAD
REFH
REFL
DD
SS
summarizes I/O pin characteristics. These characteristics are determined by the way the
Signal Properties Summary
Dir
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I
High Current
Pin
—
—
—
—
—
—
—
Y
N
N
N
N
N
N
N
N
N
N
N
N
N
N
N
N
Y
Y
Y
Y
MC9S08GB/GT Data Sheet, Rev. 2.3
Table 2-2. Signal Properties
Output
Slew
SWC
SWC
SWC
SWC
SWC
SWC
SWC
SWC
SWC
SWC
SWC
SWC
SWC
SWC
SWC
SWC
SWC
SWC
SWC
SWC
—
—
—
—
—
—
—
N
1
Pull-Up
SWC
SWC
SWC
SWC
SWC
SWC
SWC
SWC
SWC
SWC
SWC
SWC
SWC
SWC
SWC
SWC
SWC
SWC
SWC
SWC
—
—
—
—
—
—
Y
Y
2
The 48-pin QFN package has two V
and V
Pin contains integrated pullup.
IRQPE must be set to enable IRQ function.
IRQ does not have a clamp diode to V
not be driven above V
Pullup/pulldown active when IRQ pin function
enabled. Pullup forced on when IRQ enabled for
falling edges; pulldown forced on when IRQ enabled
for rising edges.
Pullup/pulldown active when KBI pin function
enabled. Pullup forced on when KBI1Px enabled for
falling edges; pulldown forced on when KBI1Px
enabled for rising edges.
When pin is configured for SCI function, pin is
configured for partial output drive.
SS2
.
Recommended System Connections
Comments
DD
.
SS
DD
pins — V
. IRQ should
SS1
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