YR0K42378FC000BA Renesas Electronics America, YR0K42378FC000BA Datasheet - Page 114
YR0K42378FC000BA
Manufacturer Part Number
YR0K42378FC000BA
Description
KIT EVAL FOR H8S/2378
Manufacturer
Renesas Electronics America
Series
H8®r
Type
MCUr
Datasheet
1.YR0K42378FC000BA.pdf
(1208 pages)
Specifications of YR0K42378FC000BA
Contents
Board
For Use With/related Products
H8S/2378
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
- Current page: 114 of 1208
- Download datasheet (8Mb)
Section 2 CPU
2.4.4
This 8-bit register contains internal CPU status information, including an interrupt mask bit (I) and
half-carry (H), negative (N), zero (Z), overflow (V), and carry (C) flags.
Operations can be performed on the CCR bits by the LDC, STC, ANDC, ORC, and XORC
instructions. The N, Z, V, and C flags are used as branching conditions for conditional branch
(Bcc) instructions.
Bit
7
6
5
4
3
2
Rev.7.00 Mar. 18, 2009 page 46 of 1136
REJ09B0109-0700
Bit Name
I
UI
H
U
N
Z
Condition-Code Register (CCR)
Initial Value
1
Undefined
Undefined
Undefined
Undefined
Undefined
R/W
R/W
R/W
R/W
R/W
R/W
R/W
Description
Interrupt Mask Bit
Masks interrupts other than NMI when set to 1. NMI is
accepted regardless of the I bit setting. The I bit is set
to 1 at the start of an exception-handling sequence.
For details, refer to section 5, Interrupt Controller.
User Bit or Interrupt Mask Bit
Can be written to and read from by software using the
LDC, STC, ANDC, ORC, and XORC instructions.
For this LSI, Interrupt Mask Bit is not available.
Half-Carry Flag
When the ADD.B, ADDX.B, SUB.B, SUBX.B, CMP.B
or NEG.B instruction is executed, this flag is set to 1 if
there is a carry or borrow at bit 3, and cleared to 0
otherwise. When the ADD.W, SUB.W, CMP.W, or
NEG.W instruction is executed, the H flag is set to 1 if
there is a carry or borrow at bit 11, and cleared to 0
otherwise. When the ADD.L, SUB.L, CMP.L, or NEG.L
instruction is executed, the H flag is set to 1 if there is
a carry or borrow at bit 27, and cleared to 0 otherwise.
User Bit
Can be written to and read from by software using the
LDC, STC, ANDC, ORC, and XORC instructions.
Negative Flag
Stores the value of the most significant bit of data as a
sign bit.
Zero Flag
Set to 1 to indicate zero data, and cleared to 0 to
indicate non-zero data.
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