YR0K42378FC000BA Renesas Electronics America, YR0K42378FC000BA Datasheet - Page 319
YR0K42378FC000BA
Manufacturer Part Number
YR0K42378FC000BA
Description
KIT EVAL FOR H8S/2378
Manufacturer
Renesas Electronics America
Series
H8®r
Type
MCUr
Datasheet
1.YR0K42378FC000BA.pdf
(1208 pages)
Specifications of YR0K42378FC000BA
Contents
Board
For Use With/related Products
H8S/2378
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
- Current page: 319 of 1208
- Download datasheet (8Mb)
Read after Write: If an external read occurs after an external write while the ICIS2 bit is set to 1
in BCR, an idle cycle is inserted at the start of the read cycle.
Figure 6.67 shows an example of the operation in this case. In this example, bus cycle A is a CPU
write cycle and bus cycle B is a read cycle from an external device. In (a), an idle cycle is not
inserted, and a collision occurs in bus cycle B between the CPU write data and read data from an
external device. In (b), an idle cycle is inserted, and a data collision is prevented.
Address bus
CS (area A)
CS (area B)
HWR, LWR
Data bus
RD
Figure 6.67 Example of Idle Cycle Operation (Read after Write)
φ
(a) No idle cycle insertion
T
(ICIS2 = 0)
1
Bus cycle A
Long output floating time
T
2
T
3
Bus cycle B
T
1
T
2
Data collision
Address bus
CS (area A)
CS (area B)
Data bus
HWR
RD
Rev.7.00 Mar. 18, 2009 page 251 of 1136
φ
T
(b) Idle cycle insertion
1
Bus cycle A
(ICIS2 = 1, initial value)
Section 6 Bus Controller (BSC)
T
2
T
3
Idle cycle
T
i
Bus cycle B
REJ09B0109-0700
T
1
T
2
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