M30879FLGP#U3 Renesas Electronics America, M30879FLGP#U3 Datasheet - Page 126

IC M32C/87 MCU FLASH 100LQFP

M30879FLGP#U3

Manufacturer Part Number
M30879FLGP#U3
Description
IC M32C/87 MCU FLASH 100LQFP
Manufacturer
Renesas Electronics America
Series
M16C™ M32C/80r
Datasheets

Specifications of M30879FLGP#U3

Core Size
16/32-Bit
Program Memory Size
1MB (1M x 8)
Core Processor
M32C/80
Speed
32MHz
Connectivity
CAN, EBI/EMI, I²C, IEBus, IrDA, SIO, UART/USART
Peripherals
DMA, POR, PWM, WDT
Number Of I /o
85
Program Memory Type
FLASH
Ram Size
48K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 5.5 V
Data Converters
A/D 26x10b; D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
100-LQFP
Controller Family/series
M32C
No. Of I/o's
85
Ram Memory Size
48KB
Cpu Speed
32MHz
No. Of Timers
2
Digital Ic Case Style
LQFP
Embedded Interface Type
CAN, I2C, UART
Rohs Compliant
Yes
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
R0K330879S001BE - KIT DEV RSK M32C/87R0K330879S000BE - KIT DEV RSK M32C/87
Eeprom Size
-
Lead Free Status / RoHS Status
Lead free / RoHS Compliant, Lead free / RoHS Compliant

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M32C/87 Group (M32C/87, M32C/87A, M32C/87B)
REJ09B0180-0151 Rev.1.51 Jul 31, 2008
Page 102 of 587
Figure 9.15
(1) Initial setting
(2) Before entering stop mode
(3) After exiting wait mode
NOTE:
RLVL register: bits RLVL2 to RLVL0 = 7
I flag = 0
FLG register: set IPL
Bits RLVL2 to RLVL0 = the same level as IPL
PRCR register: PRC0 bit = 1
CM1 register: CM17 bit = 0
CM2 register: CM21 bit = 0
CM0 register: CM07 bit = 0
PM2 register: PM24 bit = 0
I flag = 1
CM1 register: CM10 bit = 1
RLVL register: bits RLVL2 to RLVL0 = 7
1. Insert the jmp.b instruction as follows after the instruction to set the CM10 bit to 1.
Set the interrupt priority level (ILVL2 to ILVL0) of
LABEL_001:
CM2 register: CM20 bit = 0
Set the interrupt priority level of the interrupts,
Set an interrupt priority level of each interrupt
When the oscillation stop detect function is used
which is not used to exit stop mode, to 0
bset 0,
jmp.b LABEL_001 ; jmp.b instruction executed (no instruction
nop
nop
nop
nop
mov.b #0, prcr
the interrupt used to exit stop mode
Procedure to Enter Stop Mode
PRC1 bit = 1
cm1
.
.
.
Stop mode
Start
End
; between jmp.b and LABEL.)
; all clocks stopped (stop mode)
; nop(1)
; nop(2)
; nop(3)
; nop(4)
; protection set
(Note 1)
Set the wait/stop mode
exit interrupt priority level to 7.
Interrupt disabled
(ILVL2 to ILVL0)
Set the processor interrupt priority level (IPL)*
Set the exit interrupt priority level (RLVL2 to RLVL0)*
Enable writing to registers associated with clocks
Select the main clock as the CPU clock source
(Set after a main clock oscillation stabilizes)
Disable oscillation stop detect function
Interrupt enabled
All clocks stop
Set the exit priority level as soon as exiting wait mode
> IPL* = (RLVL2 to RLVL0)*
9. Clock Generation Circuits

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