M30879FLGP#U3 Renesas Electronics America, M30879FLGP#U3 Datasheet - Page 376

• Manufacturer Part Number: M30879FLGP#U3
• Description: IC M32C/87 MCU FLASH 100LQFP
• Manufacturer: Renesas Electronics America
• Series: M16C™ M32C/80r

Specifications of M30879FLGP#U3

• Core Size: 16/32-Bit
• Program Memory Size: 1MB (1M x 8)
• Core Processor: M32C/80
• Speed: 32MHz
• Connectivity: CAN, EBI/EMI, I²C, IEBus, IrDA, SIO, UART/USART
• Peripherals: DMA, POR, PWM, WDT
• Number Of I /o: 85
• Program Memory Type: FLASH
• Ram Size: 48K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 5.5 V
• Data Converters: A/D 26x10b; D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 100-LQFP
• Controller Family/series: M32C
• No. Of I/o's: 85
• Ram Memory Size: 48KB
• Cpu Speed: 32MHz
• No. Of Timers: 2
• Digital Ic Case Style: LQFP
• Embedded Interface Type: CAN, I2C, UART
• Rohs Compliant: Yes
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: R0K330879S001BE - KIT DEV RSK M32C/87R0K330879S000BE - KIT DEV RSK M32C/87
• Eeprom Size: -
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant, Lead free / RoHS Compliant

M32C/87 Group (M32C/87, M32C/87A, M32C/87B)
REJ09B0180-0151 Rev.1.51 Jul 31, 2008
Page 352 of 587
Figure 22.25
j = 0 to 7; k = 0 to 4, 8 to 10
NOTE:
1. Set all the interrupt request flags to 0. If any of these flags remains 1, the IR bit in the IIOkIC register does not become 1
when an interrupt request is generated in the same register (Interrupt does not occur).
< When interrupt is used >
I flag = 0
IIOkIE register: PO1jE bit = 0
G2BCR0 register = 01111111b
BTSR register = 00h
G2BCR0 register = 00h
G1BCR0 register: bits BCK1 and BCK0
G1BCR0 register:
G1BCR0 register:
G1BCR1 register: bits RST2 and RST1
G1BCR1 register:
G1BCR1 register:
G1POCRj register:
G1POj register
G1FS register: FSCj bit = 0
G1FE register: IFEj bit = 1
IIOkIR register = 00h
IIOkIE register: IRLT bit = 1
IIOkIE register: PO1jE bit = 1
IIOkIC register: bits ILVL2 to ILVL0
I flag = 1
G1BCR1 register: BTS bit = 1
Wait time (2 or more fBT1 clock cycles)
Pin setting for waveform generation
Register Settings for Waveform Generation Function (Group 1)
IR bit = 0
bits DIV4 to DIV0
IT bit
BTS bit = 0
bits UD1 and UD0
bits MOD2 and MOD0
IVL bit
RLD bit
INV bit
Start
End
(1)
Interrupt disabled
Waveform generation function interrupt disabled
Count source select bits
Count source divide ratio select bits
Base timer interrupt generation timing select bit
Base timer reset source select bits
Base timer reset
Counter increment/decrement control bits
Operating mode select bits
Output level select bit
G1POj register value reload timing select bit
Inverted output function select bit
Set output timing
Waveform generation function selected
Channel j's function enabled
Interrupt not requested
Interrupt request is used for
interrupt
Waveform generation function
interrupt request enabled
Interrupt priority level select bit
Interrupt not requested
Interrupt enabled
Base timer count starts
Reset the BTSR register
22. Intelligent I/O (Waveform Generation Function)
Do not set at the same time.
Set the PO1jE bit to 1
after setting the IRLT bit to 1.