M30879FLGP#U3 Renesas Electronics America, M30879FLGP#U3 Datasheet - Page 306

• Manufacturer Part Number: M30879FLGP#U3
• Description: IC M32C/87 MCU FLASH 100LQFP
• Manufacturer: Renesas Electronics America
• Series: M16C™ M32C/80r

Specifications of M30879FLGP#U3

• Core Size: 16/32-Bit
• Program Memory Size: 1MB (1M x 8)
• Core Processor: M32C/80
• Speed: 32MHz
• Connectivity: CAN, EBI/EMI, I²C, IEBus, IrDA, SIO, UART/USART
• Peripherals: DMA, POR, PWM, WDT
• Number Of I /o: 85
• Program Memory Type: FLASH
• Ram Size: 48K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 5.5 V
• Data Converters: A/D 26x10b; D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 100-LQFP
• Controller Family/series: M32C
• No. Of I/o's: 85
• Ram Memory Size: 48KB
• Cpu Speed: 32MHz
• No. Of Timers: 2
• Digital Ic Case Style: LQFP
• Embedded Interface Type: CAN, I2C, UART
• Rohs Compliant: Yes
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: R0K330879S001BE - KIT DEV RSK M32C/87R0K330879S000BE - KIT DEV RSK M32C/87
• Eeprom Size: -
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant, Lead free / RoHS Compliant

M32C/87 Group (M32C/87, M32C/87A, M32C/87B)
REJ09B0180-0151 Rev.1.51 Jul 31, 2008
Page 282 of 587
Figure 17.48
RE bit in the
UiC1 register
TE bit in the
UiC1 register
TI bit in the UiC1
register
RTSi output
CLKi input
RXDi input
RI bit in the
UiC1 register
UiRR bit in the
IIOkIR register
OER bit in the
UiRB register
k = 0 when i = 5, k = 9 when i = 6
fEXT = external clock frequency
The above applies under the following conditions:
NOTE:
- UiMR register: CKDIR bit = 1 (external clock)
- UiC0 reigster: CRD bit = 1 (CTS function disabled)
1. Satisfy the following conditions, while the CLKi pin input is "H" before the data receive operation.
(1)
- UiC1 register: TE bit = 1 (transmit operation enabled)
- Write dummy data to the UiTB register
Receive Operation when External Clock is Selected
“H”
“L”
“H”
“L”
“H”
“L”
1
0
1
0
1
0
1
0
1
0
1
0
CKPOL bit = 0 (receive data input at the rising edge of the serial clock)
RE bit = 1 (receive operation enabled)
Transfer data from UARTi
receive shift register to UiRB
register
D0 D1 D2 D3 D4 D5 D6
Transfer data from UiTB register
to UARTi transmit shift register
fEXT
1
Write dummy data to UiTB register
Set to 0 by an interrupt request acknowledgement or by a program
Becomes "L" by reading UiRB register
D7
A read from UiRB register
D0 D1 D2 D3 D4 D5 D6
17. Serial Interfaces (UART5 and UART6)
D7
D0 D1 D2 D3 D4 D5
D6
D7