M30879FLGP#U3 Renesas Electronics America, M30879FLGP#U3 Datasheet - Page 98

• Manufacturer Part Number: M30879FLGP#U3
• Description: IC M32C/87 MCU FLASH 100LQFP
• Manufacturer: Renesas Electronics America
• Series: M16C™ M32C/80r

Specifications of M30879FLGP#U3

• Core Size: 16/32-Bit
• Program Memory Size: 1MB (1M x 8)
• Core Processor: M32C/80
• Speed: 32MHz
• Connectivity: CAN, EBI/EMI, I²C, IEBus, IrDA, SIO, UART/USART
• Peripherals: DMA, POR, PWM, WDT
• Number Of I /o: 85
• Program Memory Type: FLASH
• Ram Size: 48K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 5.5 V
• Data Converters: A/D 26x10b; D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 100-LQFP
• Controller Family/series: M32C
• No. Of I/o's: 85
• Ram Memory Size: 48KB
• Cpu Speed: 32MHz
• No. Of Timers: 2
• Digital Ic Case Style: LQFP
• Embedded Interface Type: CAN, I2C, UART
• Rohs Compliant: Yes
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: R0K330879S001BE - KIT DEV RSK M32C/87R0K330879S000BE - KIT DEV RSK M32C/87
• Eeprom Size: -
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant, Lead free / RoHS Compliant

M32C/87 Group (M32C/87, M32C/87A, M32C/87B)
REJ09B0180-0151 Rev.1.51 Jul 31, 2008
Page 74 of 587
Figure 8.7
• Bus cycle 2
• Bus cycle 2
• Bus cycle 3
NOTE:
i=0 to 3
1. When the MCU accesses the same CS area consecutively, the
WR (WRL)
WR (WRL)
WR (WRL)
Read data
Read data
Read data
Write data
Write data
Write data
LA: Latch address
BCLK
BCLK
BCLK
ALE
ALE
ALE
CSi
CSi
CSi
RD
RD
RD
φ
φ
φ
Bus Cycles when Multiplexed Bus is Selected (1/2)
+ 2
+ 5
+ 3
φ
φ
φ
LA
LA
LA
LA
1 bus cycle = 4
RD: Read data
LA
LA
1 bus cycle = 6
1 bus cycle = 7
φ
WD
RD
WD: Write data
φ
φ
(Note 1)
WD
WD
RD
RD
(Note 1)
(Note 1)
CSi
• Bus cycle 2
pin keeps outputting "L".
WR (WRL)
Read data
Write data
BCLK
ALE
CSi
RD
φ
+ 3
φ
LA
LA
1 bus cycle = 5
φ
WD
RD
(Note 1)
8. Bus