M30879FLGP#U3 Renesas Electronics America, M30879FLGP#U3 Datasheet - Page 601

IC M32C/87 MCU FLASH 100LQFP

M30879FLGP#U3

Manufacturer Part Number
M30879FLGP#U3
Description
IC M32C/87 MCU FLASH 100LQFP
Manufacturer
Renesas Electronics America
Series
M16C™ M32C/80r
Datasheets

Specifications of M30879FLGP#U3

Core Size
16/32-Bit
Program Memory Size
1MB (1M x 8)
Core Processor
M32C/80
Speed
32MHz
Connectivity
CAN, EBI/EMI, I²C, IEBus, IrDA, SIO, UART/USART
Peripherals
DMA, POR, PWM, WDT
Number Of I /o
85
Program Memory Type
FLASH
Ram Size
48K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 5.5 V
Data Converters
A/D 26x10b; D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
100-LQFP
Controller Family/series
M32C
No. Of I/o's
85
Ram Memory Size
48KB
Cpu Speed
32MHz
No. Of Timers
2
Digital Ic Case Style
LQFP
Embedded Interface Type
CAN, I2C, UART
Rohs Compliant
Yes
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
R0K330879S001BE - KIT DEV RSK M32C/87R0K330879S000BE - KIT DEV RSK M32C/87
Eeprom Size
-
Lead Free Status / RoHS Status
Lead free / RoHS Compliant, Lead free / RoHS Compliant

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M32C/87 Group (M32C/87, M32C/87A, M32C/87B)
REJ09B0180-0151 Rev.1.51 Jul 31, 2008
Page 577 of 587
28.14 CAN
Figure 28.6
Figure 28.7
Use the following procedures to abort a remote frame transmit operation or to cancel a remote frame receive
operation. (Technical update: TN-16C-126A/EA)
i = 0, 1, j = 0 to 15
NOTES:
i = 0, 1, j = 0 to 15
NOTES:
1. The CiMCTLj register can be accessed when the BANKSEL bit the CiCTLR1 register is set to 0
2. There is an infinite loop set in the flowchart to simplify the description. Set the time limit to break
1. The CiMCTLj register can be accessed when the BANKSEL bit the CiCTLR1 register is set to 0
2. There is an infinite loop set in the flowchart to simplify the description. Set the time limit to break
(note 2)
Procedure to Abort a Remote Frame Transmit Operation
Procedure to Cancel a Remote Frame Receive Operation
(note 2)
(registers CiMCTLj, CiSSCTLR, and CiSSSTR are selected).
out of the infinite loop for practical use.
(registers CiMCTLj, CiSSCTLR, and CiSSSTR are selected).
out of each infinite loop for practical use.
NO
NO
CiMCTLj register: REMACTIVE bit is 0 ?
CiMCTLj register: REMACTIVE bit = 0 ?
Read the CiMCTLj register
Read the CiMCTLj register
Start of transmit operation
End of transmit operation
Start of receive operation
End of receive operation
CiMCTLj register = 00h
CiMCTLj register = 00h
cancel procedure
cancel procedure
abort procedure
abort procedure
YES
YES
(note 1)
(note 1)
28. Usage Notes

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