M30879FLGP#U3 Renesas Electronics America, M30879FLGP#U3 Datasheet - Page 131

• Manufacturer Part Number: M30879FLGP#U3
• Description: IC M32C/87 MCU FLASH 100LQFP
• Manufacturer: Renesas Electronics America
• Series: M16C™ M32C/80r

Specifications of M30879FLGP#U3

• Core Size: 16/32-Bit
• Program Memory Size: 1MB (1M x 8)
• Core Processor: M32C/80
• Speed: 32MHz
• Connectivity: CAN, EBI/EMI, I²C, IEBus, IrDA, SIO, UART/USART
• Peripherals: DMA, POR, PWM, WDT
• Number Of I /o: 85
• Program Memory Type: FLASH
• Ram Size: 48K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 5.5 V
• Data Converters: A/D 26x10b; D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 100-LQFP
• Controller Family/series: M32C
• No. Of I/o's: 85
• Ram Memory Size: 48KB
• Cpu Speed: 32MHz
• No. Of Timers: 2
• Digital Ic Case Style: LQFP
• Embedded Interface Type: CAN, I2C, UART
• Rohs Compliant: Yes
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: R0K330879S001BE - KIT DEV RSK M32C/87R0K330879S000BE - KIT DEV RSK M32C/87
• Eeprom Size: -
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant, Lead free / RoHS Compliant

M32C/87 Group (M32C/87, M32C/87A, M32C/87B)
REJ09B0180-0151 Rev.1.51 Jul 31, 2008
Page 107 of 587
11.2
11.2.1
11.2.2
11.2.3
11.2.4
11.2.5
Software interrupts occur when particular instructions are executed. Software interrupts are non-maskable.
The undefined instruction interrupt occurs when the UND instruction is executed.
The overflow interrupt occurs when the INTO instruction is executed while the O flag in the FLG register is 1
(arithmetic operation overflow). Instructions that can set the O flag are: ABS, ADC, ADCF, ADD, ADDX,
CMP, CMPX, DIV, DIVU, DIVX, NEG, RMPA, SBB, SCMPU, SHA, SUB, SUBX
The BRK interrupt occurs when the BRK instruction is executed.
The BRK2 interrupt occurs when the BRK2 instruction is executed.
Do not use this interrupt. This is for use with development support tool only.
The INT instruction interrupt occurs when the INT instruction is executed. The INT instruction can specify
software interrupt numbers 0 to 63. Software interrupt numbers 8 to 54 and 57 are assigned to the vector table
used for the peripheral function interrupt. This means that the MCU is able to execute the peripheral function
interrupt routine by executing the INT instruction. When the INT instruction is executed, values in the FLG
register and PC are saved to the stack. The relocatable vector of the specified software interrupt number is
stored in PC.
The stack, where the data is saved, varies depending on a software interrupt number.
ISP is selected for software interrupt numbers 0 to 31. (The U flag in the FLG register becomes 0.) For software
interrupt numbers 32 to 63, SP which is selected immediately before executing the INT instruction is used. (The
U flag does not change.)
For the peripheral function interrupt, the FLG register value is saved and the U flag becomes 0 (ISP selected)
when an interrupt request is acknowledged. Therefore, for software interrupt numbers 32 to 54 and 57, SP to be
used can differ depending on whether an interrupt is generated by a peripheral function or by the INT
instruction.
Software Interrupts
Undefined Instruction Interrupt
Overflow Interrupt
BRK Interrupt
BRK2 Interrupt
INT Instruction Interrupt
11. Interrupts