M30879FLGP#U3 Renesas Electronics America, M30879FLGP#U3 Datasheet - Page 157

• Manufacturer Part Number: M30879FLGP#U3
• Description: IC M32C/87 MCU FLASH 100LQFP
• Manufacturer: Renesas Electronics America
• Series: M16C™ M32C/80r

Specifications of M30879FLGP#U3

• Core Size: 16/32-Bit
• Program Memory Size: 1MB (1M x 8)
• Core Processor: M32C/80
• Speed: 32MHz
• Connectivity: CAN, EBI/EMI, I²C, IEBus, IrDA, SIO, UART/USART
• Peripherals: DMA, POR, PWM, WDT
• Number Of I /o: 85
• Program Memory Type: FLASH
• Ram Size: 48K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 5.5 V
• Data Converters: A/D 26x10b; D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 100-LQFP
• Controller Family/series: M32C
• No. Of I/o's: 85
• Ram Memory Size: 48KB
• Cpu Speed: 32MHz
• No. Of Timers: 2
• Digital Ic Case Style: LQFP
• Embedded Interface Type: CAN, I2C, UART
• Rohs Compliant: Yes
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: R0K330879S001BE - KIT DEV RSK M32C/87R0K330879S000BE - KIT DEV RSK M32C/87
• Eeprom Size: -
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant, Lead free / RoHS Compliant

M32C/87 Group (M32C/87, M32C/87A, M32C/87B)
REJ09B0180-0151 Rev.1.51 Jul 31, 2008
Page 133 of 587
Figure 11.21
Example: Intelligent I/O Group 1 Waveform Generation Function 1 Interrupt, Group 2 Waveform Generation Function 3
NO
NO
NO
<Interrupt setting>
NOTES:
1. Do not change the interrupt enable bit (bits 1 to 7 in the IIOiIE register (i = 0 to 11)) and the IRLT bit in the IIOiIE register
2. If an interrupt request is generated while writing a 0 to the corresponding interrupt request flag, the flag may not be cleared to
3. Ensure that all the enabled interrupt request flags are set to 0. If any of these flags remains 1, the IR bit in the IIOiIC (CANkIC
IIO8IR register = 00h
IIO8IE register: IRLT bit = 1
IIO8IE register: PO11E bit = 1
IIO8IC register: bits ILVL2 to ILVL0
I flag = 1
IIO8IR register: PO11R bit = 0
IIO8IR register: PO23R bit = 0
simultaneously. Set the IRLT bit to 1 first, and then set the interrupt enable bit to 1.
0. In this case, keep writing a 0 until 0 is read.
(k = 0 to 5)) register does not become 1 when an interrupt request is generated in the same register. (Interrupt does not occur.)
Interrupt are used.
IIO8IR register: PO11R bit = 1 ?
IIO8IR register: PO23R bit = 1 ?
Interrupt Routine Example
Interrupt processing of PO11
Interrupt processing of PO23
IIO8IR register & 06h = 0 ?
Interrupt routine
PO23E bit = 1
bits 7 to 3 = 00000b
IR bit = 0
End
YES
YES
YES
Initialize the Interrupt Request Register
Uses an interrupt request for interrupts
Enable intelligent I/O group 1 waveform generation function 1 interrupt
Enable intelligent I/O group 2 waveform generation function 3 interrupt
Disable unused interrupts
Interrupt priority level select bits
Interrupt not requested
Interrupt enabled
Set to 0 (interrupt not requested) using AND or BCLR instruction
Set to 0 (interrupt not requested) using AND or BCLR instruction
(note 3)
(2)
(2)
(note 1)
11. Interrupts