M30879FLGP#U3 Renesas Electronics America, M30879FLGP#U3 Datasheet - Page 419

IC M32C/87 MCU FLASH 100LQFP

M30879FLGP#U3

Manufacturer Part Number
M30879FLGP#U3
Description
IC M32C/87 MCU FLASH 100LQFP
Manufacturer
Renesas Electronics America
Series
M16C™ M32C/80r
Datasheets

Specifications of M30879FLGP#U3

Core Size
16/32-Bit
Program Memory Size
1MB (1M x 8)
Core Processor
M32C/80
Speed
32MHz
Connectivity
CAN, EBI/EMI, I²C, IEBus, IrDA, SIO, UART/USART
Peripherals
DMA, POR, PWM, WDT
Number Of I /o
85
Program Memory Type
FLASH
Ram Size
48K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 5.5 V
Data Converters
A/D 26x10b; D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
100-LQFP
Controller Family/series
M32C
No. Of I/o's
85
Ram Memory Size
48KB
Cpu Speed
32MHz
No. Of Timers
2
Digital Ic Case Style
LQFP
Embedded Interface Type
CAN, I2C, UART
Rohs Compliant
Yes
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
R0K330879S001BE - KIT DEV RSK M32C/87R0K330879S000BE - KIT DEV RSK M32C/87
Eeprom Size
-
Lead Free Status / RoHS Status
Lead free / RoHS Compliant, Lead free / RoHS Compliant

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M32C/87 Group (M32C/87, M32C/87A, M32C/87B)
REJ09B0180-0151 Rev.1.51 Jul 31, 2008
Page 395 of 587
Figure 22.58
Group 2 SI/O Communication Control Register
b7 b6 b5 b4
NOTE:
1. The group 2 base timer may be reset when the RE or IPOL bit setting is changed. To avoid resetting, set the RST2 bit in the
G2BCR1 register to 0 (base timer is not reset by a reset request from the communication function).
b3
b2
G2CR Register
b1
b0
Bit Symbol
TXEPT
OPOL
IPOL
(b3)
TE
RE
Symbol
G2CR
RI
TI
Transmit operation enable bit
Transmit shift register
empty flag
G2TB register empty flag
Unimplemented.
Write 0. Read as undefined value.
Receive operation enable bit
Receive complete flag
ISTXD output polarity invert bit
ISRXD input polarity invert bit
Bit Name
Address
016Bh
(1)
(1)
22. Intelligent I/O (Group 2 Communication Function)
0 : Transmit operation disabled
1 : Transmit operation enabled
0 : Data is in the transmit shift register
1 : No data is in the transmit shift register
0 : Data is in the G2TB register
1 : No data is in the G2TB register
0 : Receive operation disabled
1 : Receive operation enabled
0 : No data is in the G2RB register
1 : Data is in the G2RB register
0 : Not inverted
1 : Inverted
0 : Not inverted
1 : Inverted
(during transmit operation)
(transmit operation is completed)
Function
After Reset
0000 X000b
RW
RW
RW
RW
RW
RO
RO
RO

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