M30879FLGP#U3 Renesas Electronics America, M30879FLGP#U3 Datasheet - Page 90

• Manufacturer Part Number: M30879FLGP#U3
• Description: IC M32C/87 MCU FLASH 100LQFP
• Manufacturer: Renesas Electronics America
• Series: M16C™ M32C/80r

Specifications of M30879FLGP#U3

• Core Size: 16/32-Bit
• Program Memory Size: 1MB (1M x 8)
• Core Processor: M32C/80
• Speed: 32MHz
• Connectivity: CAN, EBI/EMI, I²C, IEBus, IrDA, SIO, UART/USART
• Peripherals: DMA, POR, PWM, WDT
• Number Of I /o: 85
• Program Memory Type: FLASH
• Ram Size: 48K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 5.5 V
• Data Converters: A/D 26x10b; D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 100-LQFP
• Controller Family/series: M32C
• No. Of I/o's: 85
• Ram Memory Size: 48KB
• Cpu Speed: 32MHz
• No. Of Timers: 2
• Digital Ic Case Style: LQFP
• Embedded Interface Type: CAN, I2C, UART
• Rohs Compliant: Yes
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: R0K330879S001BE - KIT DEV RSK M32C/87R0K330879S000BE - KIT DEV RSK M32C/87
• Eeprom Size: -
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant, Lead free / RoHS Compliant

M32C/87 Group (M32C/87, M32C/87A, M32C/87B)
REJ09B0180-0151 Rev.1.51 Jul 31, 2008
Page 66 of 587
8.2
8.2.1
8.2.2
Described below are the signals required to access external devices and the bus timing. The signals are available in
memory expansion mode and microprocessor mode only.
Address bus is the signals to access 16-Mbyte space, and consists of 24 control pins; A0 to A22 and A23. A23
is an inverse output signal of the highest-order address bit.
Data bus is the signals for data input and output. The DS register selects either an 8-bit data bus width from D0
to D7 or a 16-bit data bus width from D0 to D15 for each external space. When a high-level (“H”) signal is
applied to the BYTE pin, the data bus accessing the external space 3 is 8 bits wide after reset. When a low-level
(“L”) signal is applied to the BYTE pin, the data bus accessing the external space 3 is 16 bits wide.
When changing single-chip mode to memory expansion mode, the address bus value is undefined until the
MCU accesses an external space.
Chip-select outputs share pins with address bus, A20 to A22 and A23. Bits PM11 and PM10 in the PM1 register
determine the CS areas to be accessed and the number of chip-select outputs. Maximum of four chip-select
outputs are provided.
In microprocessor mode, no chip-select signal is output after reset. Only A23, however, can perform as a chip-
select output.
The CSi pin (i = 0 to 3) outputs an “L” signal while accessing its corresponding external space. An “H” signal is
output while the MCU is accessing other external spaces. Figure 8.2 shows an example of address bus and chip-
select outputs (separate bus).
Bus Control
Address Bus and Data Bus
Chip-Select Output
8. Bus