Z8F2480AN020SG Zilog, Z8F2480AN020SG Datasheet - Page 141

MCU 8BIT 24KB FLASH 44LQFP

Z8F2480AN020SG

Manufacturer Part Number
Z8F2480AN020SG
Description
MCU 8BIT 24KB FLASH 44LQFP
Manufacturer
Zilog
Series
Encore!® XP®r
Datasheets

Specifications of Z8F2480AN020SG

Core Processor
Z8
Core Size
8-Bit
Speed
20MHz
Connectivity
I²C, IrDA, LIN, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, LED, LVD, POR, PWM, Temp Sensor, WDT
Number Of I /o
37
Program Memory Size
24KB (24K x 8)
Program Memory Type
FLASH
Ram Size
3K x 8
Voltage - Supply (vcc/vdd)
1.8 V ~ 3.6 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
0°C ~ 70°C
Package / Case
44-LQFP
Processor Series
Z8F248x
Core
eZ8
Data Bus Width
8 bit
Data Ram Size
2 KB
Interface Type
I2C, SPI, UART
Maximum Clock Frequency
20 MHz
Number Of Programmable I/os
37
Number Of Timers
3
Maximum Operating Temperature
+ 70 C
Mounting Style
SMD/SMT
Minimum Operating Temperature
0 C
On-chip Adc
10 bit, 8 Channel
For Use With
770-1002 - ISP 4PORT ZILOG Z8 ENCORE! MCU269-4643 - KIT DEV Z8 ENCORE XP 28-PIN269-4630 - DEV KIT FOR Z8 ENCORE 8K/4K269-4629 - KIT DEV Z8 ENCORE XP 28-PIN269-4628 - KIT DEV Z8 ENCORE XP 8-PIN
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / Rohs Status
 Details
Other names
269-4676

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
Z8F2480AN020SG
Manufacturer:
Zilog
Quantity:
85
Part Number:
Z8F2480AN020SG
Manufacturer:
Zilog
Quantity:
10 000
Table 67. MCT High Byte Register (MCTH)
Table 68. MCT Low Byte Register (MCTL)
PS025011-1010
BITS
FIELD
RESET
R/W
ADDR
BITS
FIELD
RESET
R/W
ADDR
Multi-Channel Timer High and Low Byte Registers
R/W
R/W
7
0
7
0
The High and Low Byte (MCTH and MCTL) registers (see
contain the current 16-bit MCT count value.
Writing to the MCT High and Low Byte registers while the MCT is enabled is not
recommended. If either or both the MCT High or Low byte registers are written during
counting, the 8-bit written value is placed in the counter (High and/or Low byte) at the
next system clock edge. The counter continues counting from the new value.
Table 66. Multi-Channel Timer Address Map (Continued)
Address/Sub-address
Subregister 2
0
1
2
3
4
5
R/W
R/W
6
0
6
0
R/W
R/W
5
0
5
0
P R E L I M I N A R Y
Register/Subregister Name
Reserved
Reserved
Channel A Control
Channel B Control
Channel C Control
Channel D Control
R/W
R/W
4
0
4
0
MCTH
MCTL
FA0H
FA1H
R/W
R/W
3
0
3
0
Z8 Encore! XP
R/W
R/W
2
0
2
0
Table 67
Product Specification
and
R/W
R/W
Multi-Channel Timer
1
0
1
0
®
Table
F1680 Series
68)
R/W
R/W
0
0
0
0
127

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