Z8F2480AN020SG Zilog, Z8F2480AN020SG Datasheet - Page 177

• Manufacturer Part Number: Z8F2480AN020SG
• Description: MCU 8BIT 24KB FLASH 44LQFP
• Manufacturer: Zilog
• Series: Encore!® XP®r

Specifications of Z8F2480AN020SG

• Core Processor: Z8
• Core Size: 8-Bit
• Speed: 20MHz
• Connectivity: I²C, IrDA, LIN, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, LED, LVD, POR, PWM, Temp Sensor, WDT
• Number Of I /o: 37
• Program Memory Size: 24KB (24K x 8)
• Program Memory Type: FLASH
• Ram Size: 3K x 8
• Voltage - Supply (vcc/vdd): 1.8 V ~ 3.6 V
• Data Converters: A/D 8x10b
• Oscillator Type: Internal
• Operating Temperature: 0°C ~ 70°C
• Package / Case: 44-LQFP
• Processor Series: Z8F248x
• Core: eZ8
• Data Bus Width: 8 bit
• Data Ram Size: 2 KB
• Interface Type: I2C, SPI, UART
• Maximum Clock Frequency: 20 MHz
• Number Of Programmable I/os: 37
• Number Of Timers: 3
• Maximum Operating Temperature: + 70 C
• Mounting Style: SMD/SMT
• Minimum Operating Temperature: 0 C
• On-chip Adc: 10 bit, 8 Channel
• For Use With: 770-1002 - ISP 4PORT ZILOG Z8 ENCORE! MCU269-4643 - KIT DEV Z8 ENCORE XP 28-PIN269-4630 - DEV KIT FOR Z8 ENCORE 8K/4K269-4629 - KIT DEV Z8 ENCORE XP 28-PIN269-4628 - KIT DEV Z8 ENCORE XP 8-PIN
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: Details
• Other names: 269-4676

PS025011-1010
LIN-UART Mode Select and Status Register
LIN Slave Autobaud Complete (ATB)—This bit is set in LIN SLAVE mode when an
autobaud character is received. If the ABIEN bit is set in the LIN Control Register, then a
receive interrupt is generated when this bit is set. Reading the Status 0 Register clears this
bit. This bit will be 0 in LIN MASTER mode.
The LIN-UART Mode Select and Status Register
tus bits. A more detailed discussion of each bit follows the table.
Table 87. LIN-UART Mode Select and Status Register (U0MDSTAT = F44H)
7
000 = Multiprocessor and normal UART control/status
001 = Noise filter control/status
010 = LIN protocol control/status
011 = Reserved
100 = Reserved
101 = Reserved
110 = Reserved
111 = LIN-UART hardware revision (allows hardware revision to be read 
4
MSEL[2:0]=000, MULTIPROCESSOR mode status = {0,0,0,NEWFRM, MPRX}
MSEL[2:0]=001, Noise filter status = {NE,0,0,0,0}
MSEL[2:0]=010, LIN mode status = {NE, RxBreakLength}
MSEL[2:0]=011, Reserved; must be 00000
MSEL[2:0]=100, Reserved; must be 00000
MSEL[2:0]=101, Reserved; must be 00000
MSEL[2:0]=110, Reserved; must be 00000
MSEL[2:0]=111, LIN-UART hardware revision
Mode Select (MSEL)—This R/W field determines which control register is accessed
when performing a Write or Read to the UART Control 1 Register address. This field also
determines which status is returned in the Mode Status field when reading this register.
Mode Status—This read-only field returns status corresponding to one of four modes
selected by MSEL. These four modes are described in
BITS
FIELD
RESET
R/W
ADDR
Note: R = Read; R/W = Read/Write
–
–
5 Mode Select
0 Mode Status
in the Mode Status field
R/W
7
0
MSEL
R/W
6
0
P R E L I M I N A R Y
R/W
5
0
F44H, F4CH
R
4
0
(Table
R
3
0
Table 88
Z8 Encore! XP
87) contains mode select and sta-
MODE STATUS
on page 164.
Product Specification
R
2
0
®
R
1
0
F1680 Series
LIN-UART
R
0
0
163