Z8F2480AN020SG Zilog, Z8F2480AN020SG Datasheet - Page 64

• Manufacturer Part Number: Z8F2480AN020SG
• Description: MCU 8BIT 24KB FLASH 44LQFP
• Manufacturer: Zilog
• Series: Encore!® XP®r

Specifications of Z8F2480AN020SG

• Core Processor: Z8
• Core Size: 8-Bit
• Speed: 20MHz
• Connectivity: I²C, IrDA, LIN, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, LED, LVD, POR, PWM, Temp Sensor, WDT
• Number Of I /o: 37
• Program Memory Size: 24KB (24K x 8)
• Program Memory Type: FLASH
• Ram Size: 3K x 8
• Voltage - Supply (vcc/vdd): 1.8 V ~ 3.6 V
• Data Converters: A/D 8x10b
• Oscillator Type: Internal
• Operating Temperature: 0°C ~ 70°C
• Package / Case: 44-LQFP
• Processor Series: Z8F248x
• Core: eZ8
• Data Bus Width: 8 bit
• Data Ram Size: 2 KB
• Interface Type: I2C, SPI, UART
• Maximum Clock Frequency: 20 MHz
• Number Of Programmable I/os: 37
• Number Of Timers: 3
• Maximum Operating Temperature: + 70 C
• Mounting Style: SMD/SMT
• Minimum Operating Temperature: 0 C
• On-chip Adc: 10 bit, 8 Channel
• For Use With: 770-1002 - ISP 4PORT ZILOG Z8 ENCORE! MCU269-4643 - KIT DEV Z8 ENCORE XP 28-PIN269-4630 - DEV KIT FOR Z8 ENCORE 8K/4K269-4629 - KIT DEV Z8 ENCORE XP 28-PIN269-4628 - KIT DEV Z8 ENCORE XP 8-PIN
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: Details
• Other names: 269-4676

Architecture
GPIO Alternate Functions
PS025011-1010
System
DATA
Clock
Bus
Data Register
Port Output
Figure 9
ability to accommodate alternate functions and variable port current drive strength.
Many GPIO port pins are used for GPIO and to access the on-chip peripheral functions
like the timers and serial-communication devices. The Port A–E Alternate Function
subregisters configure these pins for either GPIO or alternate function operation. When a
pin is configured for alternate function, control of port-pin direction (input/output) is
passed from Port A–E Data Direction registers to the alternate functions assigned to this
pin.
functions possible with each port pin for every package. The alternate function associated
at a pin is defined through alternate function sets subregisters AFS1 and AFS2.
The crystal oscillator and the 32 kHz secondary oscillator functionalities are not 
controlled by the GPIO block. When the crystal oscillator or the 32 kHz secondary 
oscillator is enabled in the oscillator control block, the GPIO functionality of PA0 and
PA1, or PA2 and PA3, is overridden. In such a case, those pins function as input and 
output for the crystal oscillator.
D
Table 15
Q
displays a simplified block diagram of a GPIO port pin and does not illustrate the
on page 52,
Figure 9. GPIO Port Pin Block Diagram
System
Clock
Port Output Control
Port Data Direction
Table 16
P R E L I M I N A R Y
Data Register
Port Input
Q
on page 54, and
D
Table 17
Q
Z8 Encore! XP
D
on page 57 list the alternate
General-Purpose Input/Output
Schmitt-Trigger
Product Specification
GND
VDD
®
F1680 Series
Port
Pin
50