Z8F2480AN020SG Zilog, Z8F2480AN020SG Datasheet - Page 334

• Manufacturer Part Number: Z8F2480AN020SG
• Description: MCU 8BIT 24KB FLASH 44LQFP
• Manufacturer: Zilog
• Series: Encore!® XP®r

Specifications of Z8F2480AN020SG

• Core Processor: Z8
• Core Size: 8-Bit
• Speed: 20MHz
• Connectivity: I²C, IrDA, LIN, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, LED, LVD, POR, PWM, Temp Sensor, WDT
• Number Of I /o: 37
• Program Memory Size: 24KB (24K x 8)
• Program Memory Type: FLASH
• Ram Size: 3K x 8
• Voltage - Supply (vcc/vdd): 1.8 V ~ 3.6 V
• Data Converters: A/D 8x10b
• Oscillator Type: Internal
• Operating Temperature: 0°C ~ 70°C
• Package / Case: 44-LQFP
• Processor Series: Z8F248x
• Core: eZ8
• Data Bus Width: 8 bit
• Data Ram Size: 2 KB
• Interface Type: I2C, SPI, UART
• Maximum Clock Frequency: 20 MHz
• Number Of Programmable I/os: 37
• Number Of Timers: 3
• Maximum Operating Temperature: + 70 C
• Mounting Style: SMD/SMT
• Minimum Operating Temperature: 0 C
• On-chip Adc: 10 bit, 8 Channel
• For Use With: 770-1002 - ISP 4PORT ZILOG Z8 ENCORE! MCU269-4643 - KIT DEV Z8 ENCORE XP 28-PIN269-4630 - DEV KIT FOR Z8 ENCORE 8K/4K269-4629 - KIT DEV Z8 ENCORE XP 28-PIN269-4628 - KIT DEV Z8 ENCORE XP 8-PIN
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: Details
• Other names: 269-4676

Assembly Language Syntax
eZ8 CPU Instruction Notation
PS025011-1010
Table 175. Assembly Language Syntax Example 2
Table 174. Assembly Language Syntax Example 1
For proper instruction execution, eZ8 CPU assembly language syntax requires that the
operands be written as destination and source. After assembly, the object code usually has
the operands in the order source, destination, but ordering is opcode-dependent. The
following instruction examples illustrate the format of some basic assembly instructions
and the resulting object code produced by the assembler. You must follow this binary
format if you prefer manual program coding or intend to implement your own assembler.
Example 1: If the contents of Registers 43H and 08H are added and the result is stored in
43H, the assembly syntax and resulting object code is as listed in
Example 2: In general, when an instruction format requires an 8-bit register address, that
address can specify any register location in the range 0–255 or, using Escaped Mode
Addressing, a Working Register R0–R15. If the contents of Register 43H and Working
Register R8 are added and the result is stored in 43H, the assembly syntax and resulting
object code is as listed in
Assembly Language Code ADD
Object Code
See the device-specific Product Specification to determine the exact register file range
available. The register file size varies depending on the device type.
In the section
status flags, and address modes are represented by a notational shorthand provided in
Table
Assembly Language Code ADD
Object Code
176.
eZ8 CPU Instruction Summary
Table
P R E L I M I N A R Y
04
04
175.
43H,
08
43H,
E8
on page 327, the operands, condition codes,
08H
43
R8
43
Z8 Encore! XP
(ADD dst, src)
(OPC src, dst)
(ADD dst, src)
(OPC src, dst)
Product Specification
Table
eZ8 CPU Instruction Set
174.
®
F1680 Series
320