MC9S08QG8CDTE Freescale Semiconductor, MC9S08QG8CDTE Datasheet - Page 106

IC MCU 8K FLASH 10MHZ 16-TSSOP

MC9S08QG8CDTE

Manufacturer Part Number
MC9S08QG8CDTE
Description
IC MCU 8K FLASH 10MHZ 16-TSSOP
Manufacturer
Freescale Semiconductor
Series
HCS08r
Datasheet

Specifications of MC9S08QG8CDTE

Core Processor
HCS08
Core Size
8-Bit
Speed
20MHz
Connectivity
I²C, SCI, SPI
Peripherals
LVD, POR, PWM, WDT
Number Of I /o
12
Program Memory Size
8KB (8K x 8)
Program Memory Type
FLASH
Ram Size
512 x 8
Voltage - Supply (vcc/vdd)
1.8 V ~ 3.6 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
16-TSSOP
Cpu Family
HCS08
Device Core Size
8b
Frequency (max)
20MHz
Interface Type
I2C/SCI/SPI
Total Internal Ram Size
512Byte
# I/os (max)
12
Number Of Timers - General Purpose
1
Operating Supply Voltage (typ)
2.5/3.3V
Operating Supply Voltage (max)
3.6V
Operating Supply Voltage (min)
1.8V
On-chip Adc
8-chx10-bit
Instruction Set Architecture
CISC
Operating Temp Range
-40C to 85C
Operating Temperature Classification
Industrial
Mounting
Surface Mount
Pin Count
16
Package Type
TSSOP
Processor Series
S08QG
Core
HCS08
Data Bus Width
8 bit
Data Ram Size
512 B
Maximum Clock Frequency
20 MHz
Number Of Programmable I/os
12
Number Of Timers
1
Operating Supply Voltage
1.8 V to 3.6 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
EWS08
Development Tools By Supplier
DEMO9S08QG8E
Minimum Operating Temperature
- 40 C
Package
16TSSOP
Family Name
HCS08
Maximum Speed
20 MHz
For Use With
DEMO9S08QG8E - BOARD DEMO FOR MC9S08QG8
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / Rohs Status
Compliant

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0
Chapter 7 Central Processor Unit (S08CPUV2)
104
TXS
WAIT
Source Form: Everything in the source forms columns, except expressions in italic characters, is literal information which must appear in
Operation Symbols:
CCR Bits:
the assembly source file exactly as shown. The initial 3- to 5-letter mnemonic and the characters (# , ( ) and +) are always a literal
characters.
n
opr8i
opr16i
opr8a
opr16a
oprx8
oprx16
rel
A
CCR
H
M
n
opr
PC
PCH
PCL
rel
SP
SPL
X
&
|
( )
+
×
÷
#
:
V
H
I
N
Z
C
Source
Form
Accumulator
Condition code register
Index register high byte
Memory location
Any bit
Operand (one or two bytes)
Program counter
Program counter high byte
Program counter low byte
Relative program counter offset byte
Stack pointer
Stack pointer low byte
Index register low byte
Logical AND
Logical OR
Logical EXCLUSIVE OR
Contents of
Add
Subtract, Negation (two’s complement)
Multiply
Divide
Immediate value
Loaded with
Concatenated with
Overflow bit
Half-carry bit
Interrupt mask
Negative bit
Zero bit
Carry/borrow bit
Any label or expression that evaluates to a single integer in the range 0-7.
Any label or expression that evaluates to an 8-bit immediate value.
Any label or expression that evaluates to a 16-bit immediate value.
Any label or expression that evaluates to an 8-bit direct-page address ($00xx).
Any label or expression that evaluates to a 16-bit address.
Any label or expression that evaluates to an unsigned 8-bit value, used for indexed addressing.
Any label or expression that evaluates to a 16-bit value, used for indexed addressing.
Any label or expression that refers to an address that is within –128 to +127 locations from the start of the next instruction.
Transfer Index Reg. to SP
SP ← (H:X) – $0001
Enable Interrupts; Wait for Interrupt
I bit ← 0; Halt CPU
Table 7-2. . Instruction Set Summary (Sheet 9 of 9)
MC9S08QG8 and MC9S08QG4 Data Sheet, Rev. 5
Operation
INH
INH
Addressing Modes:
Cycle-by-Cycle Codes:
CCR Effects:
DIR
EXT
IMM
INH
IX
IX1
IX2
IX+
IX1+
REL
SP1
SP2
f
p
r
s
u
v
w
U
Direct addressing mode
Extended addressing mode
Immediate addressing mode
Inherent addressing mode
Indexed, no offset addressing mode
Indexed, 8-bit offset addressing mode
Indexed, 16-bit offset addressing mode
Indexed, no offset, post increment addressing mode
Indexed, 8-bit offset, post increment addressing mode
Relative addressing mode
Stack pointer, 8-bit offset addressing mode
Stack pointer 16-bit offset addressing mode
Free cycle. This indicates a cycle where the CPU
does not require use of the system buses. An f
cycle is always one cycle of the system bus clock
and is always a read cycle.
Progryam fetch; read from next consecutive
location in program memory
Read 8-bit operand
Push (write) one byte onto stack
Pop (read) one byte from stack
Read vector from $FFxx (high byte first)
Write 8-bit operand
Set or cleared
Not affected
Undefined
Object Code
94
8F
2+
2
fp
fp...
Cyc-by-Cyc
Details
Freescale Semiconductor
VH I N Z C
– – – – – –
– – 0 – – –
on CCR
Affect

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