MC9S08QG8CDTE Freescale Semiconductor, MC9S08QG8CDTE Datasheet - Page 52

IC MCU 8K FLASH 10MHZ 16-TSSOP

MC9S08QG8CDTE

Manufacturer Part Number
MC9S08QG8CDTE
Description
IC MCU 8K FLASH 10MHZ 16-TSSOP
Manufacturer
Freescale Semiconductor
Series
HCS08r
Datasheet

Specifications of MC9S08QG8CDTE

Core Processor
HCS08
Core Size
8-Bit
Speed
20MHz
Connectivity
I²C, SCI, SPI
Peripherals
LVD, POR, PWM, WDT
Number Of I /o
12
Program Memory Size
8KB (8K x 8)
Program Memory Type
FLASH
Ram Size
512 x 8
Voltage - Supply (vcc/vdd)
1.8 V ~ 3.6 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
16-TSSOP
Cpu Family
HCS08
Device Core Size
8b
Frequency (max)
20MHz
Interface Type
I2C/SCI/SPI
Total Internal Ram Size
512Byte
# I/os (max)
12
Number Of Timers - General Purpose
1
Operating Supply Voltage (typ)
2.5/3.3V
Operating Supply Voltage (max)
3.6V
Operating Supply Voltage (min)
1.8V
On-chip Adc
8-chx10-bit
Instruction Set Architecture
CISC
Operating Temp Range
-40C to 85C
Operating Temperature Classification
Industrial
Mounting
Surface Mount
Pin Count
16
Package Type
TSSOP
Processor Series
S08QG
Core
HCS08
Data Bus Width
8 bit
Data Ram Size
512 B
Maximum Clock Frequency
20 MHz
Number Of Programmable I/os
12
Number Of Timers
1
Operating Supply Voltage
1.8 V to 3.6 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
EWS08
Development Tools By Supplier
DEMO9S08QG8E
Minimum Operating Temperature
- 40 C
Package
16TSSOP
Family Name
HCS08
Maximum Speed
20 MHz
For Use With
DEMO9S08QG8E - BOARD DEMO FOR MC9S08QG8
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / Rohs Status
Compliant

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0
Chapter 4 Memory Map and Register Definition
The first byte of a series of sequential bytes being programmed in burst mode will take the same amount
of time to program as a byte programmed in standard mode. Subsequent bytes will program in the burst
program time provided that the conditions above are met. In the case the next sequential address is the
beginning of a new row, the program time for that byte will be the standard time instead of the burst time.
This is because the high voltage to the array must be disabled and then enabled again. If a new burst
command has not been queued before the current command completes, then the charge pump will be
disabled and high voltage removed from the array.
50
PROGRAM FLOW
FLASH BURST
Figure 4-3. FLASH Burst Program Flowchart
MC9S08QG8 and MC9S08QG4 Data Sheet, Rev. 5
YES
WRITE COMMAND (0x25) TO FCMD
0
TO BUFFER ADDRESS AND DATA
AND CLEAR FCBEF (Note 2)
NEW BURST COMMAND ?
WRITE TO FCDIV (Note 1)
TO LAUNCH COMMAND
WRITE 1 TO FCBEF
WRITE TO FLASH
CLEAR ERROR
FACCERR ?
FACCERR ?
FPVIO OR
FCBEF ?
FCCF ?
START
DONE
1
1
NO
1
NO
YES
0
0
Note 2: Wait at least four bus cycles before
Note 1: Required only once after reset.
ERROR EXIT
checking FCBEF or FCCF.
Freescale Semiconductor

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