MC9S08QG8CDTE Freescale Semiconductor, MC9S08QG8CDTE Datasheet - Page 218

IC MCU 8K FLASH 10MHZ 16-TSSOP

MC9S08QG8CDTE

Manufacturer Part Number
MC9S08QG8CDTE
Description
IC MCU 8K FLASH 10MHZ 16-TSSOP
Manufacturer
Freescale Semiconductor
Series
HCS08r
Datasheet

Specifications of MC9S08QG8CDTE

Core Processor
HCS08
Core Size
8-Bit
Speed
20MHz
Connectivity
I²C, SCI, SPI
Peripherals
LVD, POR, PWM, WDT
Number Of I /o
12
Program Memory Size
8KB (8K x 8)
Program Memory Type
FLASH
Ram Size
512 x 8
Voltage - Supply (vcc/vdd)
1.8 V ~ 3.6 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
16-TSSOP
Cpu Family
HCS08
Device Core Size
8b
Frequency (max)
20MHz
Interface Type
I2C/SCI/SPI
Total Internal Ram Size
512Byte
# I/os (max)
12
Number Of Timers - General Purpose
1
Operating Supply Voltage (typ)
2.5/3.3V
Operating Supply Voltage (max)
3.6V
Operating Supply Voltage (min)
1.8V
On-chip Adc
8-chx10-bit
Instruction Set Architecture
CISC
Operating Temp Range
-40C to 85C
Operating Temperature Classification
Industrial
Mounting
Surface Mount
Pin Count
16
Package Type
TSSOP
Processor Series
S08QG
Core
HCS08
Data Bus Width
8 bit
Data Ram Size
512 B
Maximum Clock Frequency
20 MHz
Number Of Programmable I/os
12
Number Of Timers
1
Operating Supply Voltage
1.8 V to 3.6 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
EWS08
Development Tools By Supplier
DEMO9S08QG8E
Minimum Operating Temperature
- 40 C
Package
16TSSOP
Family Name
HCS08
Maximum Speed
20 MHz
For Use With
DEMO9S08QG8E - BOARD DEMO FOR MC9S08QG8
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / Rohs Status
Compliant

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0
Serial Peripheral Interface (S08SPIV3)
15.2
The SPI optionally shares four port pins. The function of these pins depends on the settings of SPI control
bits. When the SPI is disabled (SPE = 0), these four pins revert to being general-purpose port I/O pins that
are not controlled by the SPI.
15.2.1
When the SPI is enabled as a slave, this pin is the serial clock input. When the SPI is enabled as a master,
this pin is the serial clock output.
15.2.2
When the SPI is enabled as a master and SPI pin control zero (SPC0) is 0 (not bidirectional mode), this
pin is the serial data output. When the SPI is enabled as a slave and SPC0 = 0, this pin is the serial data
input. If SPC0 = 1 to select single-wire bidirectional mode, and master mode is selected, this pin becomes
the bidirectional data I/O pin (MOMI). Also, the bidirectional mode output enable bit determines whether
the pin acts as an input (BIDIROE = 0) or an output (BIDIROE = 1). If SPC0 = 1 and slave mode is
selected, this pin is not used by the SPI and reverts to being a general-purpose port I/O pin.
15.2.3
When the SPI is enabled as a master and SPI pin control zero (SPC0) is 0 (not bidirectional mode), this
pin is the serial data input. When the SPI is enabled as a slave and SPC0 = 0, this pin is the serial data
output. If SPC0 = 1 to select single-wire bidirectional mode, and slave mode is selected, this pin becomes
the bidirectional data I/O pin (SISO) and the bidirectional mode output enable bit determines whether the
pin acts as an input (BIDIROE = 0) or an output (BIDIROE = 1). If SPC0 = 1 and master mode is selected,
this pin is not used by the SPI and reverts to being a general-purpose port I/O pin.
15.2.4
When the SPI is enabled as a slave, this pin is the low-true slave select input. When the SPI is enabled as
a master and mode fault enable is off (MODFEN = 0), this pin is not used by the SPI and reverts to being
a general-purpose port I/O pin. When the SPI is enabled as a master and MODFEN = 1, the slave select
output enable bit determines whether this pin acts as the mode fault input (SSOE = 0) or as the slave select
output (SSOE = 1).
216
External Signal Description
SPSCK — SPI Serial Clock
MOSI — Master Data Out, Slave Data In
MISO — Master Data In, Slave Data Out
SS — Slave Select
BUS CLOCK
MC9S08QG8 and MC9S08QG4 Data Sheet, Rev. 5
SPPR2:SPPR1:SPPR0
1, 2, 3, 4, 5, 6, 7, or 8
Figure 15-4. SPI Baud Rate Generation
PRESCALER
DIVIDE BY
2, 4, 8, 16, 32, 64, 128, or 256
CLOCK RATE DIVIDER
SPR2:SPR1:SPR0
DIVIDE BY
Freescale Semiconductor
MASTER
SPI
BIT RATE

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