C8051F988-GM Silicon Laboratories Inc, C8051F988-GM Datasheet - Page 106

IC MCU 8BIT 4KB FLASH 24QFN

C8051F988-GM

Manufacturer Part Number
C8051F988-GM
Description
IC MCU 8BIT 4KB FLASH 24QFN
Manufacturer
Silicon Laboratories Inc
Series
C8051F9xxr
Datasheets

Specifications of C8051F988-GM

Program Memory Type
FLASH
Program Memory Size
4KB (4K x 8)
Package / Case
24-UQFN Exposed Pad, 24-HUQFN
Core Processor
8051
Core Size
8-Bit
Speed
25MHz
Connectivity
SMBus (2-Wire/I²C), SPI, UART/USART
Peripherals
Brown-out Detect/Reset, POR, PWM, Temp Sensor, WDT
Number Of I /o
17
Ram Size
512 x 8
Voltage - Supply (vcc/vdd)
1.8 V ~ 3.6 V
Data Converters
A/D 10x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Processor Series
C8051F9x
Core
8051
Data Ram Size
512 B
Interface Type
I2C, SMBus, Enhanced UART, Enhanced SPI
Maximum Clock Frequency
7 KHz
Number Of Programmable I/os
17
Number Of Timers
4
Operating Supply Voltage
2.4 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
PK51, CA51, A51, ULINK2
Development Tools By Supplier
C8051F996DK
Minimum Operating Temperature
- 40 C
On-chip Adc
10 bit, 10 Channel
On-chip Dac
10 bit, 4 Channel
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
Other names
336-1959-5
C8051F99x-C8051F98x
SFR Definition 8.1. CS0CN: Capacitive Sense Control
SFR Page = 0x0; SFR Address = 0xB0
106
Name
Reset
Bit
Type
7
6
5
4
3
2
1
0
Bit
CS0CMPEN
CS0CMPF
CS0BUSY
Reserved
CS0EOS
CS0PME
CS0INT
CS0EN
CS0EN
Name
R/W
7
0
CS0EOS
Read = Varies.
CS0 Enable.
0: CS0 disabled and in low-power mode.
1: CS0 enabled and ready to convert.
CS0 End of Scan Interrupt Flag.
0: CS0 has not completed a scan since the last time CS0EOS was cleared.
1: CS0 has completed a scan.
This bit is not automatically cleared by hardware.
CS0 Interrupt Flag.
0: CS0 has not completed a data conversion since the last time CS0INT was
cleared.
1: CS0 has completed a data conversion.
This bit is not automatically cleared by hardware.
CS0 Busy.
Read:
0: CS0 conversion is complete or a conversion is not currently in progress.
1: CS0 conversion is in progress.
Write:
0: No effect.
1: Initiates CS0 conversion if CS0CM[2:0] = 000b, 110b, or 111b.
CS0 Digital Comparator Enable Bit.
Enables the digital comparator, which compares accumulated CS0 conversion
output to the value stored in CS0THH:CS0THL.
0: CS0 digital comparator disabled.
1: CS0 digital comparator enabled.
CS0 Pin Monitor Event.
Set if any converter re-tries have occurred due to a pin monitor event. This bit
remains set until cleared by firmware.
CS0 Digital Comparator Interrupt Flag.
0: CS0 result is smaller than the value set by CS0THH and CS0THL since the last
time CS0CMPF was cleared.
1: CS0 result is greater than the value set by CS0THH and CS0THL since the last
time CS0CMPF was cleared.
R
6
0
CS0INT
R/W
5
0
CS0BUSY CS0CMPEN Reserved
R/W
4
0
Rev. 1.0
Description
R/W
3
0
R
2
0
CS0PME CS0CMPF
R
1
0
R
0
0

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