C8051F988-GM Silicon Laboratories Inc, C8051F988-GM Datasheet - Page 167

• Manufacturer Part Number: C8051F988-GM
• Description: IC MCU 8BIT 4KB FLASH 24QFN
• Manufacturer: Silicon Laboratories Inc
• Series: C8051F9xxr

Specifications of C8051F988-GM

• Program Memory Type: FLASH
• Program Memory Size: 4KB (4K x 8)
• Package / Case: 24-UQFN Exposed Pad, 24-HUQFN
• Core Processor: 8051
• Core Size: 8-Bit
• Speed: 25MHz
• Connectivity: SMBus (2-Wire/I²C), SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, POR, PWM, Temp Sensor, WDT
• Number Of I /o: 17
• Ram Size: 512 x 8
• Voltage - Supply (vcc/vdd): 1.8 V ~ 3.6 V
• Data Converters: A/D 10x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Processor Series: C8051F9x
• Core: 8051
• Data Ram Size: 512 B
• Interface Type: I2C, SMBus, Enhanced UART, Enhanced SPI
• Maximum Clock Frequency: 7 KHz
• Number Of Programmable I/os: 17
• Number Of Timers: 4
• Operating Supply Voltage: 2.4 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: PK51, CA51, A51, ULINK2
• Development Tools By Supplier: C8051F996DK
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 10 bit, 10 Channel
• On-chip Dac: 10 bit, 4 Channel
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant
• Other names: 336-1959-5

SFR Definition 15.2. PMU0FL: Power Management Unit Flag
SFR Page = 0x0; SFR Address = 0xCE
Notes:
Name
Reset
Bit
7:1
Type
0
Bit
1. The Low Power Internal Oscillator cannot be disabled and the MCU cannot be placed in Suspend or Sleep
2. PMU0 requires two system clocks to update the wake-up source flags after waking from Suspend mode. The
Mode if any wake-up flags are set to 1. Software should clear all wake-up sources after each reset and after
each wake-up from Suspend or Sleep Modes.
wake-up source flags will read ‘0’ during the first two system clocks following the wake from Suspend mode.
CS0WK
Unused
Name
R
7
0
Unused
CS0 Wake-up Source
Enable and Flag
R
6
0
Description
R
5
0
Rev. 1.0
Don’t Care.
0: Disable wake-up on
CS0 event.
1: Enable wake-up on CS0
event.
R
4
0
C8051F99x-C8051F98x
Write
R
3
0
R
2
0
1,2
0000000
Set to 1 if CS0 event
caused the last wake-up.
R
1
0
Read
CS0WK
Varies
R/W
0
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