C8051F988-GM Silicon Laboratories Inc, C8051F988-GM Datasheet - Page 218

• Manufacturer Part Number: C8051F988-GM
• Description: IC MCU 8BIT 4KB FLASH 24QFN
• Manufacturer: Silicon Laboratories Inc
• Series: C8051F9xxr

Specifications of C8051F988-GM

• Program Memory Type: FLASH
• Program Memory Size: 4KB (4K x 8)
• Package / Case: 24-UQFN Exposed Pad, 24-HUQFN
• Core Processor: 8051
• Core Size: 8-Bit
• Speed: 25MHz
• Connectivity: SMBus (2-Wire/I²C), SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, POR, PWM, Temp Sensor, WDT
• Number Of I /o: 17
• Ram Size: 512 x 8
• Voltage - Supply (vcc/vdd): 1.8 V ~ 3.6 V
• Data Converters: A/D 10x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Processor Series: C8051F9x
• Core: 8051
• Data Ram Size: 512 B
• Interface Type: I2C, SMBus, Enhanced UART, Enhanced SPI
• Maximum Clock Frequency: 7 KHz
• Number Of Programmable I/os: 17
• Number Of Timers: 4
• Operating Supply Voltage: 2.4 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: PK51, CA51, A51, ULINK2
• Development Tools By Supplier: C8051F996DK
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 10 bit, 10 Channel
• On-chip Dac: 10 bit, 4 Channel
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant
• Other names: 336-1959-5

C8051F99x-C8051F98x
218
Figure 21.4. Crossbar Priority Decoder in Example Configuration (No Pins Skipped)
Figure 21.5. Crossbar Priority Decoder in Example Configuration (4 Pins Skipped)
SF Signals
PIN I/O
TX0
RX0
SCK
MISO
MOSI
NSS*
SDA
SCL
CP0
CP0A
SYSCLK
CEX0
CEX1
CEX2
ECI
T0
T1
SF Signals
SF Signals
PIN I/O
TX0
RX0
SCK
MISO
MOSI
NSS*
SDA
SCL
CP0
CP0A
SYSCLK
CEX0
CEX1
CEX2
ECI
T0
T1
SF Signals
Port pin assigned to peripheral by the Crossbar
Special Function Signals are not assigned by the Crossbar. When
these signals are enabled, the Crossbar must be manually configured
to skip their corresponding port pins.
0
0
Port pin assigned to peripheral by the Crossbar
Special Function Signals are not assigned by the Crossbar. When
these signals are enabled, the Crossbar must be manually configured
to skip their corresponding port pins.
0
0
1
0
1
0
2
1
2
0
P0SKIP[0:7]
P0SKIP[0:7]
3
1
3
0
P0
P0
4
0
4
0
5
0
5
0
6
0
6
0
7
0
7
0
0
1
0
0
1
1
1
0
Rev. 1.0
2
0
2
0
P1SKIP[0:7]
P1SKIP[0:7]
3
0
3
0
P1
P1
4
0
4
0
*NSS is only pinned out in 4-wire SPI mode
Note: In this example, CP0, CP0A, and SYSCLK
are not selected in the Crossbar.
*NSS is only pinned out in 4-wire SPI mode
Note: In this example, CP0, CP0A, and SYSCLK
are not selected in the Crossbar.
5
0
5
0
6
0
6
0
7
0
7
0
0
0
0
0
C8051F98x-C8051F99x devices
C8051F98x-C8051F99x devices
P2.0 - P2.6 not available on
P2.0 - P2.6 not available on
1
0
1
0
2
0
2
0
P2SKIP[0:7]
P2SKIP[0:7]
3
0
P2
3
0
P2
4
0
4
0
5
0
5
0
6
0
6
0
7
0
7
0