C8051F988-GM Silicon Laboratories Inc, C8051F988-GM Datasheet - Page 220

• Manufacturer Part Number: C8051F988-GM
• Description: IC MCU 8BIT 4KB FLASH 24QFN
• Manufacturer: Silicon Laboratories Inc
• Series: C8051F9xxr

Specifications of C8051F988-GM

• Program Memory Type: FLASH
• Program Memory Size: 4KB (4K x 8)
• Package / Case: 24-UQFN Exposed Pad, 24-HUQFN
• Core Processor: 8051
• Core Size: 8-Bit
• Speed: 25MHz
• Connectivity: SMBus (2-Wire/I²C), SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, POR, PWM, Temp Sensor, WDT
• Number Of I /o: 17
• Ram Size: 512 x 8
• Voltage - Supply (vcc/vdd): 1.8 V ~ 3.6 V
• Data Converters: A/D 10x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Processor Series: C8051F9x
• Core: 8051
• Data Ram Size: 512 B
• Interface Type: I2C, SMBus, Enhanced UART, Enhanced SPI
• Maximum Clock Frequency: 7 KHz
• Number Of Programmable I/os: 17
• Number Of Timers: 4
• Operating Supply Voltage: 2.4 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: PK51, CA51, A51, ULINK2
• Development Tools By Supplier: C8051F996DK
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 10 bit, 10 Channel
• On-chip Dac: 10 bit, 4 Channel
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant
• Other names: 336-1959-5

C8051F99x-C8051F98x
SFR Definition 21.1. XBR0: Port I/O Crossbar Register 0
SFR Page = 0x0; SFR Address = 0xE1
220
Note: SPI0 can be assigned either 3 or 4 Port I/O pins.
Name
Reset
Type
7:6
Bit
Bit
5
4
3
2
1
0
SYSCKE SYSCLK Output Enable.
Unused
CP0AE
SMB0E
URT0E
SPI0E
Name
CP0E
R/W
7
0
Read = 00b. Write = Don’t Care.
Comparator0 Asynchronous Output Enable.
0: Asynchronous CP0 output unavailable at Port pin.
1: Asynchronous CP0 output routed to Port pin.
Comparator0 Output Enable.
0: CP1 output unavailable at Port pin.
1: CP1 output routed to Port pin.
0: SYSCLK output unavailable at Port pin.
1: SYSCLK output routed to Port pin.
SMBus I/O Enable.
0: SMBus I/O unavailable at Port pin.
1: SDA and SCL routed to Port pins.
SPI0 I/O Enable.
0: SPI0 I/O unavailable at Port pin.
1: SCK, MISO, and MOSI (for SPI0) routed to Port pins.
UART0 Output Enable.
0: UART I/O unavailable at Port pin.
1: TX0 and RX0 routed to Port pins P0.4 and P0.5.
NSS (for SPI0) routed to Port pin only if SPI0 is configured to 4-wire mode.
R/W
6
0
CP0AE
R/W
5
0
CP0E
R/W
Rev. 1.0
4
0
Function
SYSCKE
R/W
3
0
SMB0E
R/W
2
0
SPI0E
R/W
1
0
URT0E
R/W
0
0