C8051F988-GM Silicon Laboratories Inc, C8051F988-GM Datasheet - Page 308

• Manufacturer Part Number: C8051F988-GM
• Description: IC MCU 8BIT 4KB FLASH 24QFN
• Manufacturer: Silicon Laboratories Inc
• Series: C8051F9xxr

Specifications of C8051F988-GM

• Program Memory Type: FLASH
• Program Memory Size: 4KB (4K x 8)
• Package / Case: 24-UQFN Exposed Pad, 24-HUQFN
• Core Processor: 8051
• Core Size: 8-Bit
• Speed: 25MHz
• Connectivity: SMBus (2-Wire/I²C), SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, POR, PWM, Temp Sensor, WDT
• Number Of I /o: 17
• Ram Size: 512 x 8
• Voltage - Supply (vcc/vdd): 1.8 V ~ 3.6 V
• Data Converters: A/D 10x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Processor Series: C8051F9x
• Core: 8051
• Data Ram Size: 512 B
• Interface Type: I2C, SMBus, Enhanced UART, Enhanced SPI
• Maximum Clock Frequency: 7 KHz
• Number Of Programmable I/os: 17
• Number Of Timers: 4
• Operating Supply Voltage: 2.4 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: PK51, CA51, A51, ULINK2
• Development Tools By Supplier: C8051F996DK
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 10 bit, 10 Channel
• On-chip Dac: 10 bit, 4 Channel
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant
• Other names: 336-1959-5

C8051F99x-C8051F98x
26.3.6. 16-Bit Pulse Width Modulator Mode
A PCA module may also be operated in 16-Bit PWM mode. 16-bit PWM mode is independent of the other
(8/9/10/11-bit) PWM modes. In this mode, the 16-bit capture/compare module defines the number of PCA
clocks for the low time of the PWM signal. When the PCA counter matches the module contents, the
output on CEXn is asserted high; when the 16-bit counter overflows, CEXn is asserted low. To output a
varying duty cycle, new value writes should be synchronized with PCA CCFn match interrupts. 16-Bit
PWM Mode is enabled by setting the ECOMn, PWMn, and PWM16n bits in the PCA0CPMn register. For a
varying duty cycle, match interrupts should be enabled (ECCFn = 1 AND MATn = 1) to help synchronize
the capture/compare register writes. If the MATn bit is set to 1, the CCFn flag for the module will be set
each time a 16-bit comparator match (rising edge) occurs. The CF flag in PCA0CN can be used to detect
the overflow (falling edge). The duty cycle for 16-Bit PWM Mode is given by Equation 26.4.
Important Note About Capture/Compare Registers: When writing a 16-bit value to the PCA0
Capture/Compare registers, the low byte should always be written first. Writing to PCA0CPLn clears the
ECOMn bit to 0; writing to PCA0CPHn sets ECOMn to 1.
Using Equation 26.4, the largest duty cycle is 100% (PCA0CPn = 0), and the smallest duty cycle is
0.0015% (PCA0CPn = 0xFFFF). A 0% duty cycle may be generated by clearing the ECOMn bit to 0.
308
PCA0CPLn
Write to
Reset
PCA0CPHn
Write to
0
ENB
ENB
1
W
M
P
1
6
n
1
O
M
E
C
n
PCA0CPMn
C
A
P
P
n
0 0 x 0
C
A
P
N
n
M
A
T
n
PCA Timebase
O
G
T
n
W
M
P
n
E
C
C
F
n
x
Equation 26.4. 16-Bit PWM Duty Cycle
Figure 26.10. PCA 16-Bit PWM Mode
Duty Cycle
Enable
PCA0CPHn
PCA0H
=
16-bit Comparator
Rev. 1.0

---------------------------------------------------- -
65536 PCA0CPn
PCA0CPLn
PCA0L
–
65536
Overflow
match

S
R
SET
CLR
Q
Q
CEXn
Crossbar
Port I/O