C8051F988-GM Silicon Laboratories Inc, C8051F988-GM Datasheet - Page 77

IC MCU 8BIT 4KB FLASH 24QFN

C8051F988-GM

Manufacturer Part Number
C8051F988-GM
Description
IC MCU 8BIT 4KB FLASH 24QFN
Manufacturer
Silicon Laboratories Inc
Series
C8051F9xxr
Datasheets

Specifications of C8051F988-GM

Program Memory Type
FLASH
Program Memory Size
4KB (4K x 8)
Package / Case
24-UQFN Exposed Pad, 24-HUQFN
Core Processor
8051
Core Size
8-Bit
Speed
25MHz
Connectivity
SMBus (2-Wire/I²C), SPI, UART/USART
Peripherals
Brown-out Detect/Reset, POR, PWM, Temp Sensor, WDT
Number Of I /o
17
Ram Size
512 x 8
Voltage - Supply (vcc/vdd)
1.8 V ~ 3.6 V
Data Converters
A/D 10x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Processor Series
C8051F9x
Core
8051
Data Ram Size
512 B
Interface Type
I2C, SMBus, Enhanced UART, Enhanced SPI
Maximum Clock Frequency
7 KHz
Number Of Programmable I/os
17
Number Of Timers
4
Operating Supply Voltage
2.4 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
PK51, CA51, A51, ULINK2
Development Tools By Supplier
C8051F996DK
Minimum Operating Temperature
- 40 C
On-chip Adc
10 bit, 10 Channel
On-chip Dac
10 bit, 4 Channel
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
Other names
336-1959-5
SFR Definition 5.6. ADC0H: ADC0 Data Word High Byte
SFR Page = 0x0; SFR Address = 0xBE
SFR Definition 5.7. ADC0L: ADC0 Data Word Low Byte
SFR Page = 0x0; SFR Address = 0xBD;
Note: If Accumulator shifting is enabled, the most significant bits of the value read will be zeros. This register
Note: If Accumulator shifting is enabled, the most significant bits of the value read will be the least significant bits of
Name
Reset
Name
Reset
Type
Bit
7:0
Type
Bit
7:0
Bit
Bit
should not be written when the SYNC bit is set to 1.
the accumulator high byte. This register should not be written when the SYNC bit is set to 1.
ADC0[15:8] ADC0 Data Word High
ADC0[7:0]
Name
Name
7
0
7
0
Byte.
ADC0 Data Word Low
Byte.
6
0
6
0
Description
Description
5
0
5
0
Rev. 1.0
Most Significant Byte of the
16-bit ADC0 Accumulator
formatted according to the
settings in AD0SJST[2:0].
Least Significant Byte of the
16-bit ADC0 Accumulator
formatted according to the
settings in AD0SJST[2:0].
4
0
4
0
ADC0[15:8]
ADC0[7:0]
R/W
R/W
C8051F99x-C8051F98x
Read
Read
3
0
3
0
2
0
2
0
Set the most significant
byte of the 16-bit ADC0
Accumulator to the value
written.
Set the least significant
byte of the 16-bit ADC0
Accumulator to the value
written.
1
0
1
0
Write
Write
0
0
0
0
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