C8051F988-GM Silicon Laboratories Inc, C8051F988-GM Datasheet - Page 166

• Manufacturer Part Number: C8051F988-GM
• Description: IC MCU 8BIT 4KB FLASH 24QFN
• Manufacturer: Silicon Laboratories Inc
• Series: C8051F9xxr

Specifications of C8051F988-GM

• Program Memory Type: FLASH
• Program Memory Size: 4KB (4K x 8)
• Package / Case: 24-UQFN Exposed Pad, 24-HUQFN
• Core Processor: 8051
• Core Size: 8-Bit
• Speed: 25MHz
• Connectivity: SMBus (2-Wire/I²C), SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, POR, PWM, Temp Sensor, WDT
• Number Of I /o: 17
• Ram Size: 512 x 8
• Voltage - Supply (vcc/vdd): 1.8 V ~ 3.6 V
• Data Converters: A/D 10x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Processor Series: C8051F9x
• Core: 8051
• Data Ram Size: 512 B
• Interface Type: I2C, SMBus, Enhanced UART, Enhanced SPI
• Maximum Clock Frequency: 7 KHz
• Number Of Programmable I/os: 17
• Number Of Timers: 4
• Operating Supply Voltage: 2.4 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: PK51, CA51, A51, ULINK2
• Development Tools By Supplier: C8051F996DK
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 10 bit, 10 Channel
• On-chip Dac: 10 bit, 4 Channel
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant
• Other names: 336-1959-5

C8051F99x-C8051F98x
SFR Definition 15.1. PMU0CF: Power Management Unit Configuration
SFR Page = 0x0; SFR Address = 0xB5
166
Notes:
Name
Reset
Bit
Type
7
6
5
4
3
2
1
0
Bit
1. Read-modify-write operations (ORL, ANL, etc.) should not be used on this register. Wake-up sources must
2. The Low Power Internal Oscillator cannot be disabled and the MCU cannot be placed in Suspend or Sleep
3. PMU0 requires two system clocks to update the wake-up source flags after waking from Suspend mode. The
be re-enabled each time the SLEEP or SUSPEND bits are written to 1.
Mode if any wake-up flags are set to 1. Software should clear all wake-up sources after each reset and after
each wake-up from Suspend or Sleep Modes.
wake-up source flags will read ‘0’ during the first two system clocks following the wake from Suspend mode.
SUSPEND
RTCFWK
RTCAWK
PMATWK
CPT0WK
RSTWK
CLEAR
SLEEP
SLEEP
Name
W
7
0
SUSPEND
Sleep Mode Select
Suspend Mode Select
Wake-up Flag Clear
Reset Pin Wake-up Flag
SmaRTClock Oscillator
Fail Wake-up Source
Enable and Flag
SmaRTClock Alarm
Wake-up Source Enable
and Flag
Port Match Wake-up
Source Enable and Flag
Comparator0 Wake-up
Source Enable and Flag
W
6
0
Description
CLEAR
W
5
0
RSTWK
Varies
Rev. 1.0
Writing 1 places the
device in Sleep Mode.
Writing 1 places the
device in Suspend Mode.
Writing 1 clears all wake-
up flags.
N/A
0: Disable wake-up on
SmaRTClock Osc. Fail.
1: Enable wake-up on
SmaRTClock Osc. Fail.
0: Disable wake-up on
SmaRTClock Alarm.
1: Enable wake-up on
SmaRTClock Alarm.
0: Disable wake-up on
Port Match Event.
1: Enable wake-up on 
Port Match Event.
0: Disable wake-up on
Comparator0 rising edge.
1: Enable wake-up on
Comparator0 rising edge.
R
4
RTCFWK
Varies
Write
R/W
3
RTCAWK
Varies
R/W
2
N/A
N/A
N/A
Set to 1 if a glitch has
been detected on RST.
Set to 1 if the SmaRT-
Clock Oscillator has failed.
Set to 1 if a SmaRTClock
Alarm has occurred.
Set to 1 if a Port Match
Event has occurred.
Set to 1 if Comparator0
rising edge caused the last
wake-up.
PMATWK
Varies
R/W
1
Read
1,2,3
CPT0WK
Varies
R/W
0