C8051F988-GM Silicon Laboratories Inc, C8051F988-GM Datasheet - Page 160

IC MCU 8BIT 4KB FLASH 24QFN

C8051F988-GM

Manufacturer Part Number
C8051F988-GM
Description
IC MCU 8BIT 4KB FLASH 24QFN
Manufacturer
Silicon Laboratories Inc
Series
C8051F9xxr
Datasheets

Specifications of C8051F988-GM

Program Memory Type
FLASH
Program Memory Size
4KB (4K x 8)
Package / Case
24-UQFN Exposed Pad, 24-HUQFN
Core Processor
8051
Core Size
8-Bit
Speed
25MHz
Connectivity
SMBus (2-Wire/I²C), SPI, UART/USART
Peripherals
Brown-out Detect/Reset, POR, PWM, Temp Sensor, WDT
Number Of I /o
17
Ram Size
512 x 8
Voltage - Supply (vcc/vdd)
1.8 V ~ 3.6 V
Data Converters
A/D 10x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Processor Series
C8051F9x
Core
8051
Data Ram Size
512 B
Interface Type
I2C, SMBus, Enhanced UART, Enhanced SPI
Maximum Clock Frequency
7 KHz
Number Of Programmable I/os
17
Number Of Timers
4
Operating Supply Voltage
2.4 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
PK51, CA51, A51, ULINK2
Development Tools By Supplier
C8051F996DK
Minimum Operating Temperature
- 40 C
On-chip Adc
10 bit, 10 Channel
On-chip Dac
10 bit, 4 Channel
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
Other names
336-1959-5
C8051F99x-C8051F98x
SFR Definition 14.5. FLSCL: Flash Scale
SFR Page = All; SFR Address = 0xB7
SFR Definition 14.6. FLWR: Flash Write Only
SFR Page = All; SFR Address = 0xE5
160
Note: Operations which clear the BYPASS bit do not need to be immediately followed by a benign 3-byte instruction.
Name
Reset
Name
Reset
Bit
5:0
Bit
7:0
Type
Type
7
6
Bit
Bit
For code compatibility with C8051F930/31/20/21 devices, a benign 3-byte instruction whose third byte is a
don't care should follow the clear operation. See the C8051F93x-C8051F92x data sheet for more details.
FLWR[7:0] Flash Write Only.
Reserved
Reserved
BYPASS
Name
Name
R
7
0
7
0
Always Write to 0.
Flash Read Timing One-Shot Bypass.
0: The one-shot determines the Flash read time. This setting should be used for oper-
ating frequencies less than 14 MHz.
1: The system clock determines the Flash read time. This setting should be used for
frequencies greater than 14 MHz.
Reserved. Always Write to 000000.
All writes to this register have no effect on system operation.
BYPASS
R/W
6
0
6
0
R
5
0
5
0
Rev. 1.0
R
4
0
4
0
FLWR[7:0]
W
Function
Function
R
3
0
3
0
R
2
0
2
0
R
1
0
1
0
R
0
0
0
0

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