C8051F988-GM Silicon Laboratories Inc, C8051F988-GM Datasheet - Page 151
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C8051F988-GM
Manufacturer Part Number
C8051F988-GM
Description
IC MCU 8BIT 4KB FLASH 24QFN
Manufacturer
Silicon Laboratories Inc
Series
C8051F9xxr
Specifications of C8051F988-GM
Program Memory Type
FLASH
Program Memory Size
4KB (4K x 8)
Package / Case
24-UQFN Exposed Pad, 24-HUQFN
Core Processor
8051
Core Size
8-Bit
Speed
25MHz
Connectivity
SMBus (2-Wire/I²C), SPI, UART/USART
Peripherals
Brown-out Detect/Reset, POR, PWM, Temp Sensor, WDT
Number Of I /o
17
Ram Size
512 x 8
Voltage - Supply (vcc/vdd)
1.8 V ~ 3.6 V
Data Converters
A/D 10x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Processor Series
C8051F9x
Core
8051
Data Ram Size
512 B
Interface Type
I2C, SMBus, Enhanced UART, Enhanced SPI
Maximum Clock Frequency
7 KHz
Number Of Programmable I/os
17
Number Of Timers
4
Operating Supply Voltage
2.4 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
PK51, CA51, A51, ULINK2
Development Tools By Supplier
C8051F996DK
Minimum Operating Temperature
- 40 C
On-chip Adc
10 bit, 10 Channel
On-chip Dac
10 bit, 4 Channel
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
Other names
336-1959-5
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14.3. Security Options
The CIP-51 provides security options to protect the Flash memory from inadvertent modification by soft-
ware as well as to prevent the viewing of proprietary program code and constants. The Program Store
Write Enable (bit PSWE in register PSCTL) and the Program Store Erase Enable (bit PSEE in register
PSCTL) bits protect the Flash memory from accidental modification by software. PSWE must be explicitly
set to 1 before software can modify the Flash memory; both PSWE and PSEE must be set to 1 before soft-
ware can erase Flash memory. Additional security features prevent proprietary program code and data
constants from being read or altered across the C2 interface.
A Security Lock Byte located at the last byte of Flash user space offers protection of the Flash program
memory from access (reads, writes, or erases) by unprotected code or the C2 interface. See
“10. Memory Organization” on page 127
nism allows the user to lock n 512-byte Flash pages, starting at page 0 (addresses 0x0000 to 0x01FF),
where n is the 1s complement number represented by the Security Lock Byte. The page containing the
Flash Security Lock Byte is unlocked when no other Flash pages are locked (all bits of the Lock
Byte are 1) and locked when any other Flash pages are locked (any bit of the Lock Byte is 0).
The level of Flash security depends on the Flash access method. The three Flash access methods that
can be restricted are reads, writes, and erases from the C2 debug interface, user firmware executing on
unlocked pages, and user firmware executing on locked pages. Table 14.1 summarizes the Flash security
features of the C8051F99x-C8051F98x devices.
Flash pages locked:
Security Lock Byte:
ones Complement:
Figure 14.1. Flash Program Memory Map (8 kB and smaller devices)
Unlocked Flash Pages
8KB Flash Device
Lock Byte Page
Lock Byte
Reserved
for the location of the security byte. The Flash security mecha-
5 (First four Flash pages + Lock Byte Page)
Rev. 1.0
Locked when
set according
security lock
Flash pages
Access limit
to the Flash
are locked
any other
byte
C8051F99x-C8051F98x
0000 0100b
1111 1011b
4 or 2 KB Flash Device
Unlocked Flash Pages
Lock Byte Page
Lock Byte
Reserved
Section
151
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