AT91SAM9263B-CU Atmel, AT91SAM9263B-CU Datasheet - Page 1029

• Manufacturer Part Number: AT91SAM9263B-CU
• Description: IC ARM9 MCU 200 MHZ 324-TFBGA
• Manufacturer: Atmel
• Series: AT91SAMr

Specifications of AT91SAM9263B-CU

• Core Processor: ARM9
• Core Size: 16/32-Bit
• Speed: 240MHz
• Connectivity: CAN, Ethernet, I²C, MMC, SPI, SSC, UART/USART, USB
• Peripherals: AC'97, LCD, POR, PWM, WDT
• Number Of I /o: 160
• Program Memory Size: 128KB (128K x 8)
• Program Memory Type: ROM
• Ram Size: 128K x 8
• Voltage - Supply (vcc/vdd): 1.08 V ~ 1.32 V
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 324-TFBGA
• Processor Series: AT91SAMx
• Core: ARM926EJ-S
• Data Bus Width: 32 bit
• Data Ram Size: 96 KB
• Interface Type: 2-Wire, EBI, I2S, MCI, SPI, USART
• Maximum Clock Frequency: 200 MHz
• Number Of Programmable I/os: 160
• Number Of Timers: 4
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: JTRACE-ARM-2M, MDK-ARM, RL-ARM, ULINK2
• Development Tools By Supplier: AT91SAM-ICE, AT91-ISP, AT91SAM9263-EK
• Minimum Operating Temperature: - 40 C
• Package: 324TFBGA
• Device Core: ARM926EJ-S
• Family Name: 91S
• Maximum Speed: 200 MHz
• Operating Supply Voltage: 1.8|2.5|3.3 V
• Controller Family/series: AT91SAM9xxx
• No. Of I/o's: 160
• Ram Memory Size: 96KB
• Cpu Speed: 240MHz
• No. Of Timers: 1
• Rohs Compliant: Yes
• For Use With: AT91SAM9263-EK - KIT EVAL FOR AT91SAM9263AT91SAM-ICE - EMULATOR FOR AT91 ARM7/ARM9
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Data Converters: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant
• Other names: Q3735625

47.4
47.4.1
Table 47-5.
6249H–ATARM–27-Jul-09
Symbol
V
V
T
th+
th-
RES
Core Power Supply POR Characteristics
Power-up Sequence
Parameter
Threshold Voltage Rising
Threshold Voltage Falling
Reset Time
Power-On-Reset (POR) Characteristics
Table 47-4.
The AT91SAM9263 board design must comply with the power-up and power-down sequence
guidelines below to guarantee reliable operation of the device. Any deviation from these
sequences may prevent the device from booting.
VDDBU powers the Backup power switch; it must be always powered to ensure correct
behavior.
VDDCORE and VDDBU are controlled by internal POR (Power On Reset) to guarantee that
these power sources reach their target values prior to the release of POR.
Peripheral
PIO Controller A or B
PIO Controller C to E
USART
UHP
UDP
TWI
SPI
MCI
SSC
Timer Counter Channels
CAN
PWMC
EMAC
LCDC
Image Sensor Interface
AC97
• VDDIOM0, VDDIOM1, VDDIOP0, VDDIOP1 and VDDIOP2 must NOT be powered until
VDDCORE has reached a level superior to
Power Consumption by Peripheral onto AMP2 (T
Conditions
Minimum Slope of +2.0V/30ms
V
th+
.
Consumption
0.70
0.60
Min
80
14
13
12
13
16
50
40
45
13
5
9
2
9
8
7
8
A
= 25° C, V
0.85
0.75
Typ
140
AT91SAM9263
DDCORE
Max
1.00
200
0.9
= 1.2V)
µA/MHz
Unit
Units
µs
V
V
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