AT91SAM9263B-CU Atmel, AT91SAM9263B-CU Datasheet - Page 623

• Manufacturer Part Number: AT91SAM9263B-CU
• Description: IC ARM9 MCU 200 MHZ 324-TFBGA
• Manufacturer: Atmel
• Series: AT91SAMr

Specifications of AT91SAM9263B-CU

• Core Processor: ARM9
• Core Size: 16/32-Bit
• Speed: 240MHz
• Connectivity: CAN, Ethernet, I²C, MMC, SPI, SSC, UART/USART, USB
• Peripherals: AC'97, LCD, POR, PWM, WDT
• Number Of I /o: 160
• Program Memory Size: 128KB (128K x 8)
• Program Memory Type: ROM
• Ram Size: 128K x 8
• Voltage - Supply (vcc/vdd): 1.08 V ~ 1.32 V
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 324-TFBGA
• Processor Series: AT91SAMx
• Core: ARM926EJ-S
• Data Bus Width: 32 bit
• Data Ram Size: 96 KB
• Interface Type: 2-Wire, EBI, I2S, MCI, SPI, USART
• Maximum Clock Frequency: 200 MHz
• Number Of Programmable I/os: 160
• Number Of Timers: 4
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: JTRACE-ARM-2M, MDK-ARM, RL-ARM, ULINK2
• Development Tools By Supplier: AT91SAM-ICE, AT91-ISP, AT91SAM9263-EK
• Minimum Operating Temperature: - 40 C
• Package: 324TFBGA
• Device Core: ARM926EJ-S
• Family Name: 91S
• Maximum Speed: 200 MHz
• Operating Supply Voltage: 1.8|2.5|3.3 V
• Controller Family/series: AT91SAM9xxx
• No. Of I/o's: 160
• Ram Memory Size: 96KB
• Cpu Speed: 240MHz
• No. Of Timers: 1
• Rohs Compliant: Yes
• For Use With: AT91SAM9263-EK - KIT EVAL FOR AT91SAM9263AT91SAM-ICE - EMULATOR FOR AT91 ARM7/ARM9
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Data Converters: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant
• Other names: Q3735625

36.6.2.7
36.6.2.8
36.6.2.9
36.6.2.10
6249H–ATARM–27-Jul-09
31
31
31
31
31
31
Byte0[7:0]
Endianness
To Transmit a Word Stored in Big Endian Format on AC-link
To Transmit A Halfword Stored in Big Indian Format on AC-link
To Transmit a10-bit Sample Stored in Big Endian Format on AC-link
–
–
–
–
–
The application can disable event interrupts by writing in AC97 Controller Interrupt Disable Reg-
ister (AC97C_IDR). The AC97 Controller Interrupt Mask Register (AC97C_IMR) shows which
event can trigger an interrupt and which one cannot.
Endianness can be managed automatically for each channel, except for the Codec channel, by
writing to Channel Endianness Mode (CEM) in AC97C_CxMR. This enables transferring data on
AC-link in Big Endian format without any additional operation.
Word to be written in AC97 Controller Channel x Transmit Holding Register (AC97C_CxTHR)
(as it is stored in memory or microprocessor register).
Word stored in Channel x Transmit Holding Register (AC97C_CxTHR) (data to transmit)
Data transmitted on appropriate slot: data[19:0] = {Byte2[3:0], Byte1[7:0], Byte0[7:0]}.
Halfw ord to be written in AC97 Controlle r Channel x Transmit Holding Register
(AC97C_CxTHR).
Halfword stored in AC97 Controller Channel x Transmit Holding Register (AC97C_CxTHR) (data
to transmit).
Data emitted on related slot: data[19:0] = {0x0, Byte1[7:0], Byte0[7:0]}.
Halfw ord to be written in AC97 Controlle r Channel x Transmit Holding Register
(AC97C_CxTHR).
Halfword stored in AC97 Controller Channel x Transmit Holding Register (AC97C_CxTHR) (data
to transmit).
Data emitted on related slot: data[19:0] = {0x000, Byte1[1:0], Byte0[7:0]}.
24
24
24
24
24
24
23
23
23
23
23
23
–
Byte1[7:0]
20
–
–
–
–
19
Byte2[3:0]
16
16
16
16
16
16
15
15
15
15
15
15
–
Byte1[7:0]
Byte1[7:0]
Byte2[7:0]
Byte0[7:0]
Byte0[7:0]
10
Byte1
9
[1:0]
8
8
8
8
8
8
7
7
7
7
7
7
AT91SAM9263
{0x00, Byte1[1:0]}
Byte3[7:0]
Byte0[7:0]
Byte1[7:0]
Byte0[7:0]
Byte0[7:0]
.
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0
0
0
0
0
0