AT91SAM9263B-CU Atmel, AT91SAM9263B-CU Datasheet - Page 98

IC ARM9 MCU 200 MHZ 324-TFBGA

AT91SAM9263B-CU

Manufacturer Part Number
AT91SAM9263B-CU
Description
IC ARM9 MCU 200 MHZ 324-TFBGA
Manufacturer
Atmel
Series
AT91SAMr
Datasheets

Specifications of AT91SAM9263B-CU

Core Processor
ARM9
Core Size
16/32-Bit
Speed
240MHz
Connectivity
CAN, Ethernet, I²C, MMC, SPI, SSC, UART/USART, USB
Peripherals
AC'97, LCD, POR, PWM, WDT
Number Of I /o
160
Program Memory Size
128KB (128K x 8)
Program Memory Type
ROM
Ram Size
128K x 8
Voltage - Supply (vcc/vdd)
1.08 V ~ 1.32 V
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
324-TFBGA
Processor Series
AT91SAMx
Core
ARM926EJ-S
Data Bus Width
32 bit
Data Ram Size
96 KB
Interface Type
2-Wire, EBI, I2S, MCI, SPI, USART
Maximum Clock Frequency
200 MHz
Number Of Programmable I/os
160
Number Of Timers
4
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
JTRACE-ARM-2M, MDK-ARM, RL-ARM, ULINK2
Development Tools By Supplier
AT91SAM-ICE, AT91-ISP, AT91SAM9263-EK
Minimum Operating Temperature
- 40 C
Package
324TFBGA
Device Core
ARM926EJ-S
Family Name
91S
Maximum Speed
200 MHz
Operating Supply Voltage
1.8|2.5|3.3 V
Controller Family/series
AT91SAM9xxx
No. Of I/o's
160
Ram Memory Size
96KB
Cpu Speed
240MHz
No. Of Timers
1
Rohs Compliant
Yes
For Use With
AT91SAM9263-EK - KIT EVAL FOR AT91SAM9263AT91SAM-ICE - EMULATOR FOR AT91 ARM7/ARM9
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Data Converters
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
Other names
Q3735625

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13.4
After reset, the code in internal ROM is mapped at both addresses 0x0000_0000 and 0x0010_0000:
13.4.1
6249H–ATARM–27-Jul-09
400000
400004
400008
40000c
400010
400014
400018
40001c
DataFlash Boot
Valid Image Detection
ea000006
eafffffe
ea00002f
eafffffe
eafffffe
eafffffe
eafffffe
eafffffe
B
B
B
B
B
B
B
B
Figure 13-2. Remap Action after Download Completion
The DataFlash Boot program searches for a valid application in the SPI DataFlash memory. If a
valid application is found, this application is loaded into internal SRAM and executed by branch-
ing at address 0x0000_0000 after remap. This application may be the application code or a
second-level bootloader.
All the calls to functions are PC relative and do not use absolute addresses.
The DataFlash Boot software looks for a valid application by analyzing the first 28 bytes corre-
sponding to the ARM exception vectors. These bytes must implement ARM instructions for
either branch or load PC with PC relative addressing.
The sixth vector, at offset 0x14, contains the size of the image to download. The user must
replace this vector with his own vector (see
Figure 13-3. LDR Opcode
Figure 13-4. B Opcode
Unconditional instruction: 0xE for bits 31 to 28.
31
31
1
1
1
1
0x20
0x04
_main
0x0c
0x10
0x14
0x18
0x1c
1
1
28 27
28 27
0
0
0x0000_0000
0x0030_0000
0
1
1
0
1
I
24 23
24 23
P
0
U
Internal
Internal
SRAM
ROM
0
00ea000006B0x20
04eafffffeB0x04
08ea00002fB_main
0ceafffffeB0x0c
10eafffffeB0x10
14eafffffeB0x14
18eafffffeB0x18
1ceafffffeB0x1c
W 1
20 19
“Structure of ARM Vector 6” on page
Rn
REMAP
16 15
Offset (24 bits)
Rd
Internal
Internal
SRAM
ROM
12 11
Addressing Mode
AT91SAM9263
0x0000_0000
0x0040_0000
99).
0
0
98

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