AT91SAM9263B-CU Atmel, AT91SAM9263B-CU Datasheet - Page 866

• Manufacturer Part Number: AT91SAM9263B-CU
• Description: IC ARM9 MCU 200 MHZ 324-TFBGA
• Manufacturer: Atmel
• Series: AT91SAMr

Specifications of AT91SAM9263B-CU

• Core Processor: ARM9
• Core Size: 16/32-Bit
• Speed: 240MHz
• Connectivity: CAN, Ethernet, I²C, MMC, SPI, SSC, UART/USART, USB
• Peripherals: AC'97, LCD, POR, PWM, WDT
• Number Of I /o: 160
• Program Memory Size: 128KB (128K x 8)
• Program Memory Type: ROM
• Ram Size: 128K x 8
• Voltage - Supply (vcc/vdd): 1.08 V ~ 1.32 V
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 324-TFBGA
• Processor Series: AT91SAMx
• Core: ARM926EJ-S
• Data Bus Width: 32 bit
• Data Ram Size: 96 KB
• Interface Type: 2-Wire, EBI, I2S, MCI, SPI, USART
• Maximum Clock Frequency: 200 MHz
• Number Of Programmable I/os: 160
• Number Of Timers: 4
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: JTRACE-ARM-2M, MDK-ARM, RL-ARM, ULINK2
• Development Tools By Supplier: AT91SAM-ICE, AT91-ISP, AT91SAM9263-EK
• Minimum Operating Temperature: - 40 C
• Package: 324TFBGA
• Device Core: ARM926EJ-S
• Family Name: 91S
• Maximum Speed: 200 MHz
• Operating Supply Voltage: 1.8|2.5|3.3 V
• Controller Family/series: AT91SAM9xxx
• No. Of I/o's: 160
• Ram Memory Size: 96KB
• Cpu Speed: 240MHz
• No. Of Timers: 1
• Rohs Compliant: Yes
• For Use With: AT91SAM9263-EK - KIT EVAL FOR AT91SAM9263AT91SAM-ICE - EMULATOR FOR AT91 ARM7/ARM9
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Data Converters: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant
• Other names: Q3735625

Figure 43-5. Setup Transaction Followed by a Data OUT Transaction
43.5.2.2
43.5.2.3
866
USB
Bus Packets
RXSETUP Flag
RX_Data_BKO
(UDP_CSRx)
FIFO (DPR)
Content
AT91SAM9263
Data IN Transaction
Using Endpoints Without Ping-pong Attributes
Setup
PID
Setup Received
Data IN transactions are used in control, isochronous, bulk and interrupt transfers and conduct
the transfer of data from the device to the host. Data IN transactions in isochronous transfer
must be done using endpoints with ping-pong attributes.
To perform a Data IN transaction using a non ping-pong endpoint:
After the last packet has been sent, the application must clear TXCOMP once this has been set.
TXCOMP is set by the USB device when it has received an ACK PID signal for the Data IN
packet. An interrupt is pending while TXCOMP is set.
Warning: TX_COMP must be cleared after TX_PKTRDY has been set.
Note:
XX
1. The application checks if it is possible to write in the FIFO by polling TXPKTRDY in the
2. The application writes the first packet of data to be sent in the endpoint’s FIFO, writing
3. The application notifies the USB peripheral it has finished by setting the TXPKTRDY in
4. The application is notified that the endpoint’s FIFO has been released by the USB
5. The microcontroller writes the second packet of data to be sent in the endpoint’s FIFO,
6. The microcontroller notifies the USB peripheral it has finished by setting the TXPK-
7. The application clears the TXCOMP in the endpoint’s UDP_CSRx.
Data Setup
endpoint’s UDP_CSRx register (TXPKTRDY must be cleared).
zero or more byte values in the endpoint’s UDP_FDRx register,
the endpoint’s UDP_CSRx register.
device when TXCOMP in the endpoint’s UDP_CSRx register has been set. Then an
interrupt for the corresponding endpoint is pending while TXCOMP is set.
writing zero or more byte values in the endpoint’s UDP_FDRx register,
TRDY in the endpoint’s UDP_CSRx register.
Refer to Chapter 8 of the Universal Serial Bus Specification, Rev 2.0, for more information on the
Data IN protocol layer.
Set by USB Device
ACK
PID
Setup Handled by Firmware
Data OUT
PID
Interrupt Pending
Data Setup
Data OUT
Cleared by Firmware
NAK
PID
Data OUT
PID
Data Out Received
Set by USB
Device Peripheral
XX
Data OUT
6249H–ATARM–27-Jul-09
ACK
PID
Data
OUT