AT91SAM9263B-CU Atmel, AT91SAM9263B-CU Datasheet - Page 907

• Manufacturer Part Number: AT91SAM9263B-CU
• Description: IC ARM9 MCU 200 MHZ 324-TFBGA
• Manufacturer: Atmel
• Series: AT91SAMr

Specifications of AT91SAM9263B-CU

• Core Processor: ARM9
• Core Size: 16/32-Bit
• Speed: 240MHz
• Connectivity: CAN, Ethernet, I²C, MMC, SPI, SSC, UART/USART, USB
• Peripherals: AC'97, LCD, POR, PWM, WDT
• Number Of I /o: 160
• Program Memory Size: 128KB (128K x 8)
• Program Memory Type: ROM
• Ram Size: 128K x 8
• Voltage - Supply (vcc/vdd): 1.08 V ~ 1.32 V
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 324-TFBGA
• Processor Series: AT91SAMx
• Core: ARM926EJ-S
• Data Bus Width: 32 bit
• Data Ram Size: 96 KB
• Interface Type: 2-Wire, EBI, I2S, MCI, SPI, USART
• Maximum Clock Frequency: 200 MHz
• Number Of Programmable I/os: 160
• Number Of Timers: 4
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: JTRACE-ARM-2M, MDK-ARM, RL-ARM, ULINK2
• Development Tools By Supplier: AT91SAM-ICE, AT91-ISP, AT91SAM9263-EK
• Minimum Operating Temperature: - 40 C
• Package: 324TFBGA
• Device Core: ARM926EJ-S
• Family Name: 91S
• Maximum Speed: 200 MHz
• Operating Supply Voltage: 1.8|2.5|3.3 V
• Controller Family/series: AT91SAM9xxx
• No. Of I/o's: 160
• Ram Memory Size: 96KB
• Cpu Speed: 240MHz
• No. Of Timers: 1
• Rohs Compliant: Yes
• For Use With: AT91SAM9263-EK - KIT EVAL FOR AT91SAM9263AT91SAM-ICE - EMULATOR FOR AT91 ARM7/ARM9
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Data Converters: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant
• Other names: Q3735625

Table 44-11. Dithering Algorithm for Color Mode
6249H–ATARM–27-Jul-09
Frame
N+1
N+1
N+1
N+1
N+1
N+1
…
…
N
N
N
N
N
N
green_data_0
green_data_1
green_data_0
green_data_1
blue_data_0
blue_data_1
blue_data_0
blue_data_1
red_data_0
red_data_1
red_data_0
red_data_1
Signal
…
…
The output sequence obtained in the data output for monochrome mode is shown in
10.
Table 44-10. Dithering Algorithm for Monochrome Mode
Consider now color display mode and two pixels p0 and p1 with the horizontal coordinates
4*n+0, and 4*n+1. A color pixel is composed of three components: {R, G, B}. Pixel p0 will be dis-
played sending the color components {R0, G0, B0} to the display. Pixel p1 will be displayed
sending the color components {R1, G1, B1}. Suppose that the data read from memory and
mapped to the lookup tables corresponds to shade level 10 for the three color components of
both pixels, with the dithering pattern to apply to all of them being DP2_3 = “1101 1011 0110”.
Table 44-11
Dual Scan Configuration, each panel data bus acts like in the equivalent single scan
configuration.)
Frame
Number
N
N+1
N+2
N+3
N+4
N+5
N+6
N+7
...
Shadow Level
1010
1010
1010
1010
1010
1010
1010
1010
1010
1010
1010
1010
…
…
shows the output sequence in the data output bus for single scan configurations. (In
Pattern
1010
0101
1010
0101
1111
1010
0101
1010
...
Bit used
…
…
3
0
3
2
1
0
3
2
2
1
3
2
Pixel a
ON
OFF
ON
OFF
ON
ON
OFF
ON
...
Dithering Pattern
1101
1101
1101
1101
1101
1101
1011
1011
1011
1011
1011
1011
…
…
Pixel b
OFF
ON
OFF
ON
ON
OFF
ON
OFF
...
4-bit LCDD
LCDD[3]
LCDD[2]
LCDD[1]
LCDD[0]
LCDD[3]
LCDD[2]
LCDD[3]
LCDD[2]
LCDD[1]
LCDD[0]
LCDD[3]
LCDD[2]
…
…
Pixel c
ON
OFF
ON
OFF
ON
ON
OFF
ON
...
AT91SAM9263
8-bit LCDD
LCDD[7]
LCDD[6]
LCDD[5]
LCDD[4]
LCDD[3]
LCDD[2]
LCDD[7]
LCDD[6]
LCDD[5]
LCDD[4]
LCDD[3]
LCDD[2]
…
…
OFF
ON
OFF
ON
ON
OFF
ON
OFF
...
Pixel d
Table 44-
Output
G0
G1
G1
R0
R1
B1
R0
B0
R1
b0
g0
b1
…
…
907