AT91SAM9263B-CU Atmel, AT91SAM9263B-CU Datasheet - Page 780

IC ARM9 MCU 200 MHZ 324-TFBGA

AT91SAM9263B-CU

Manufacturer Part Number
AT91SAM9263B-CU
Description
IC ARM9 MCU 200 MHZ 324-TFBGA
Manufacturer
Atmel
Series
AT91SAMr
Datasheets

Specifications of AT91SAM9263B-CU

Core Processor
ARM9
Core Size
16/32-Bit
Speed
240MHz
Connectivity
CAN, Ethernet, I²C, MMC, SPI, SSC, UART/USART, USB
Peripherals
AC'97, LCD, POR, PWM, WDT
Number Of I /o
160
Program Memory Size
128KB (128K x 8)
Program Memory Type
ROM
Ram Size
128K x 8
Voltage - Supply (vcc/vdd)
1.08 V ~ 1.32 V
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
324-TFBGA
Processor Series
AT91SAMx
Core
ARM926EJ-S
Data Bus Width
32 bit
Data Ram Size
96 KB
Interface Type
2-Wire, EBI, I2S, MCI, SPI, USART
Maximum Clock Frequency
200 MHz
Number Of Programmable I/os
160
Number Of Timers
4
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
JTRACE-ARM-2M, MDK-ARM, RL-ARM, ULINK2
Development Tools By Supplier
AT91SAM-ICE, AT91-ISP, AT91SAM9263-EK
Minimum Operating Temperature
- 40 C
Package
324TFBGA
Device Core
ARM926EJ-S
Family Name
91S
Maximum Speed
200 MHz
Operating Supply Voltage
1.8|2.5|3.3 V
Controller Family/series
AT91SAM9xxx
No. Of I/o's
160
Ram Memory Size
96KB
Cpu Speed
240MHz
No. Of Timers
1
Rohs Compliant
Yes
For Use With
AT91SAM9263-EK - KIT EVAL FOR AT91SAM9263AT91SAM-ICE - EMULATOR FOR AT91 ARM7/ARM9
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Data Converters
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
Other names
Q3735625

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6249H–ATARM–27-Jul-09
The following flowchart shows how to manage a multiple write block transfer with the PDC (see
Figure
the contents of the Interrupt Mask Register (MCI_IMR).
Figure 40-12. Multiple Write Functional Flow Diagram
Notes:
40-12). Polling or interrupt method can be used to wait for the end of write according to
1. It is assumed that this command has been correctly sent (see
2. This field is also accessible in the MCI Block Register (MCI_BLKR).
Configure the PDC channel
MCI_TPR = Data Buffer Address to write
MCI_TCR = BlockLength/4
Send SET_BLOCKLEN command
Send SELECT/DESELECT_CARD
Set the PDCMODE bit
MCI_MR |= PDCMODE
Set the block length (in bytes)
MCI_MR |= (BlockLength << 16) (2)
Set the block count (if necessary)
MCI_BLKR |= (BlockCount << 0)
Send WRITE_MULTIPLE_BLOCK
command
Send STOP_TRANSMISSION
Read status register MCI_SR
MCI_PTCR = TXTEN
NOTBUSY = 0?
command
command
(1)
BLKE = 0?
Poll the bit
RETURN
Poll the bit
to select the card
No
No
(1)
(1)
(1)
Yes
Yes
Figure
AT91SAM9263
40-9).
780

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