AT91SAM9263B-CU Atmel, AT91SAM9263B-CU Datasheet - Page 169

• Manufacturer Part Number: AT91SAM9263B-CU
• Description: IC ARM9 MCU 200 MHZ 324-TFBGA
• Manufacturer: Atmel
• Series: AT91SAMr

Specifications of AT91SAM9263B-CU

• Core Processor: ARM9
• Core Size: 16/32-Bit
• Speed: 240MHz
• Connectivity: CAN, Ethernet, I²C, MMC, SPI, SSC, UART/USART, USB
• Peripherals: AC'97, LCD, POR, PWM, WDT
• Number Of I /o: 160
• Program Memory Size: 128KB (128K x 8)
• Program Memory Type: ROM
• Ram Size: 128K x 8
• Voltage - Supply (vcc/vdd): 1.08 V ~ 1.32 V
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 324-TFBGA
• Processor Series: AT91SAMx
• Core: ARM926EJ-S
• Data Bus Width: 32 bit
• Data Ram Size: 96 KB
• Interface Type: 2-Wire, EBI, I2S, MCI, SPI, USART
• Maximum Clock Frequency: 200 MHz
• Number Of Programmable I/os: 160
• Number Of Timers: 4
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: JTRACE-ARM-2M, MDK-ARM, RL-ARM, ULINK2
• Development Tools By Supplier: AT91SAM-ICE, AT91-ISP, AT91SAM9263-EK
• Minimum Operating Temperature: - 40 C
• Package: 324TFBGA
• Device Core: ARM926EJ-S
• Family Name: 91S
• Maximum Speed: 200 MHz
• Operating Supply Voltage: 1.8|2.5|3.3 V
• Controller Family/series: AT91SAM9xxx
• No. Of I/o's: 160
• Ram Memory Size: 96KB
• Cpu Speed: 240MHz
• No. Of Timers: 1
• Rohs Compliant: Yes
• For Use With: AT91SAM9263-EK - KIT EVAL FOR AT91SAM9263AT91SAM-ICE - EMULATOR FOR AT91 ARM7/ARM9
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Data Converters: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant
• Other names: Q3735625

21.3.1
Table 21-4.
Notes:
6249H–ATARM–27-Jul-09
Signals:
EBI0_, EBI1_
Controller
D0 - D7
D8 - D15
D16 - D23
D24 - D31
A0/NBS0
A1/NWR2/NBS2
A2 - A22
A23 - A25
NCS0
NCS1/SDCS
NCS2
NCS2/NANDCS
NCS3/NANDCS
NCS4/CFCS0
NCS5/CFCS1
NRD/CFOE
NWR0/NWE
NWR1/NBS1
NWR3/NBS3
(5)
1. NWR1 enables upper byte writes. NWR0 enables lower byte writes.
2. NWRx enables corresponding byte x writes. (x = 0,1,2 or 3)
3. NBS0 and NBS1 enable respectively lower and upper bytes of the lower 16-bit word.
4. NBS2 and NBS3 enable respectively lower and upper bytes of the upper 16-bit word.
5. EBI0 signals only.
6. BEx: Byte x Enable (x = 0,1,2 or 3).
7. EBI1 signals only.
(5)
Hardware Interface
(5)
(5)
(7)
(5)
EBI Pins and External Static Devices Connections
8-bit Static
A[23:25]
D0 - D7
Device
A[2:22]
Table 21-4
for each Memory Controller.
WE
CS
CS
CS
CS
CS
CS
CS
OE
A0
A1
–
–
–
–
–
details the connections to be applied between the EBI pins and the external devices
2 x 8-bit
Devices
D8 - D15
A[22:24]
D0 - D7
A[1:21]
Static
WE
WE
CS
CS
CS
CS
CS
CS
CS
OE
A0
–
–
–
–
(1)
(1)
16-bit Static
Pins of the Interfaced Device
D8 - D15
A[22:24]
D0 - D7
Device
A[1:21]
NUB
NLB
WE
CS
CS
CS
CS
CS
CS
CS
OE
A0
–
–
–
SMC
D16 - D23
D24 - D31
4 x 8-bit
Devices
D8 - D15
A[21:23]
D0 - D7
A[0:20]
Static
WE
WE
WE
WE
CS
CS
CS
CS
CS
CS
CS
OE
–
(2)
(2)
(2)
(2)
2 x 16-bit
D16 - D23
D24 - D31
Devices
A[21:23]
D0 - D7
D8 - 15
A[0:20]
NUB
NUB
Static
NLB
NLB
AT91SAM9263
WE
CS
CS
CS
CS
CS
CS
CS
OE
(3)
(4)
(3)
(4)
32-bit Static
D16 - D23
D24 - D31
A[21:23]
D0 - D7
Device
D8 - 15
A[0:20]
BE0
BE2
BE1
BE3
WE
CS
CS
CS
CS
CS
CS
CS
OE
(6)
(6)
(6)
(6)
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