AT91SAM9263B-CU Atmel, AT91SAM9263B-CU Datasheet - Page 668

• Manufacturer Part Number: AT91SAM9263B-CU
• Description: IC ARM9 MCU 200 MHZ 324-TFBGA
• Manufacturer: Atmel
• Series: AT91SAMr

Specifications of AT91SAM9263B-CU

• Core Processor: ARM9
• Core Size: 16/32-Bit
• Speed: 240MHz
• Connectivity: CAN, Ethernet, I²C, MMC, SPI, SSC, UART/USART, USB
• Peripherals: AC'97, LCD, POR, PWM, WDT
• Number Of I /o: 160
• Program Memory Size: 128KB (128K x 8)
• Program Memory Type: ROM
• Ram Size: 128K x 8
• Voltage - Supply (vcc/vdd): 1.08 V ~ 1.32 V
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 324-TFBGA
• Processor Series: AT91SAMx
• Core: ARM926EJ-S
• Data Bus Width: 32 bit
• Data Ram Size: 96 KB
• Interface Type: 2-Wire, EBI, I2S, MCI, SPI, USART
• Maximum Clock Frequency: 200 MHz
• Number Of Programmable I/os: 160
• Number Of Timers: 4
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: JTRACE-ARM-2M, MDK-ARM, RL-ARM, ULINK2
• Development Tools By Supplier: AT91SAM-ICE, AT91-ISP, AT91SAM9263-EK
• Minimum Operating Temperature: - 40 C
• Package: 324TFBGA
• Device Core: ARM926EJ-S
• Family Name: 91S
• Maximum Speed: 200 MHz
• Operating Supply Voltage: 1.8|2.5|3.3 V
• Controller Family/series: AT91SAM9xxx
• No. Of I/o's: 160
• Ram Memory Size: 96KB
• Cpu Speed: 240MHz
• No. Of Timers: 1
• Rohs Compliant: Yes
• For Use With: AT91SAM9263-EK - KIT EVAL FOR AT91SAM9263AT91SAM-ICE - EMULATOR FOR AT91 ARM7/ARM9
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Data Converters: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant
• Other names: Q3735625

37.7.3.3
Figure 37-12. Receive with Overwrite Mailbox
37.7.3.4
6249H–ATARM–27-Jul-09
(CAN_MSRx)
(CAN_MSRx)
CAN_MDHx)
(CAN_MCRx)
(CAN_MDLx
CAN BUS
MRDY
MTCR
Receive with Overwrite Mailbox
Chaining Mailboxes
MMI
A mailbox is in Receive with Overwrite Mode once the MOT field in the CAN_MMRx register has
been configured. Message ID and Message Acceptance masks must be set before Receive
Mode is enabled.
After Receive Mode is enabled, the MRDY flag in the CAN_MSR register is automatically
cleared until the first message is received. When the first message has been accepted by the
mailbox, the MRDY flag is set. An interrupt is pending for the mailbox while the MRDY flag is set.
This interrupt is masked depending on the mailbox flag in the CAN_IMR global register.
If a new message is received while the MRDY flag is set, this new message is stored in the mail-
box data register, overwriting the previous message. The MMI flag in the CAN_MSRx register
notifies the software that a message has been dropped by the mailbox. This flag is cleared when
reading the CAN_MSRx register.
The CAN controller may store a new message in the CAN data registers while the application
reads them. To check that CAN_MDHx and CAN_MDLx do not belong to different messages,
the application must check the MMI field in the CAN_MSRx register before and after reading
CAN_MDHx and CAN_MDLx. If the MMI flag is set again after the data registers have been
read, the software application has to re-read CAN_MDHx and CAN_MDLx (see
Several mailboxes may be used to receive a buffer split into several messages with the same ID.
In this case, the mailbox with the lowest number is serviced first. In the receive and receive with
overwrite modes, the field PRIOR in the CAN_MMRx register has no effect. If Mailbox 0 and
Mailbox 5 accept messages with the same ID, the first message is received by Mailbox 0 and the
second message is received by Mailbox 5. Mailbox 0 must be configured in Receive Mode (i.e.,
the first message received is considered) and Mailbox 5 must be configured in Receive with
Overwrite Mode. Mailbox 0 cannot be configured in Receive with Overwrite Mode; otherwise, all
messages are accepted by this mailbox and Mailbox 5 is never serviced.
Message 1
Reading CAN_MDHx & CAN_MDLx
Reading CAN_MSRx
Message 1
Message 2
Message 2
Message 3
Writing CAN_MCRx
Message 3
Message 4
Message ID = CAN_MIDx
AT91SAM9263
Message 4
Figure
37-12).
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